Alternatives and similar repositories for Neural-Networks-on-Silicon

Users that are interested in Neural-Networks-on-Silicon are comparing it to the libraries listed below

• nvdla / hw
  RTL, Cmodel, and testbench for NVDLA
  ☆1,885Updated 3 years ago
• doonny / PipeCNN
  An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
  ☆1,304Updated 3 years ago
• dgschwend / zynqnet
  Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"
  ☆753Updated 8 years ago
• basicmi / AI-Chip
  A list of ICs and IPs for AI, Machine Learning and Deep Learning.
  ☆1,669Updated last year
• zssloth / Embedded-Neural-Network
  collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning
  ☆559Updated last year
• ucb-bar / gemmini
  Berkeley's Spatial Array Generator
  ☆961Updated last month
• BRTResearch / AIChip_Paper_List
  ☆626Updated 4 years ago
• cornell-zhang / bnn-fpga
  Binarized Convolutional Neural Networks on Software-Programmable FPGAs
  ☆303Updated 4 years ago
• Xilinx / CHaiDNN
  HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
  ☆325Updated 5 years ago
• nvdla / doc
  Documentation for NVDLA.
  ☆248Updated 10 months ago
• nvdla / sw
  NVDLA SW
  ☆497Updated 4 years ago
• Xilinx / BNN-PYNQ
  Quantized Neural Networks (QNNs) on PYNQ
  ☆689Updated 3 years ago
• awai54st / PYNQ-Classification
  Python on Zynq FPGA for Convolutional Neural Networks
  ☆615Updated 7 years ago
• Xilinx / ml-suite
  Getting Started with Xilinx ML Suite
  ☆339Updated 4 years ago
• Xilinx / finn
  Dataflow compiler for QNN inference on FPGAs
  ☆828Updated last week
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆421Updated 5 years ago
• ARM-software / SCALE-Sim
  ☆351Updated 2 years ago
• Xilinx / SDAccel_Examples
  SDAccel Examples
  ☆357Updated 3 years ago
• THU-DSP-LAB / ventus-gpgpu
  GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
  ☆746Updated this week
• andravin / wincnn
  Winograd minimal convolution algorithm generator for convolutional neural networks.
  ☆618Updated 4 years ago
• xupsh / pp4fpgas-cn
  中文版 Parallel Programming for FPGAs
  ☆736Updated 9 months ago
• hunterlew / convolution_network_on_FPGA
  CNN acceleration on virtex-7 FPGA with verilog HDL
  ☆447Updated 7 years ago
• HewlettPackard / cacti
  An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model
  ☆463Updated 11 months ago
• JunningWu / Learning-NVDLA-Notes
  NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…
  ☆226Updated 6 years ago
• CMU-SAFARI / ramulator
  A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, …
  ☆639Updated last year
• ZFTurbo / Verilog-Generator-of-Neural-Net-Digit-Detector-for-FPGA
  Verilog Generator of Neural Net Digit Detector for FPGA
  ☆312Updated 2 years ago
• OpenDLA / OpenDLA
  A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.
  ☆143Updated 7 years ago
• Xilinx / Vitis_Libraries
  Vitis Libraries
  ☆973Updated 2 months ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆317Updated 3 years ago
• dhm2013724 / yolov2_xilinx_fpga
  A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard
  ☆848Updated 10 months ago