EECS-NTNU / bismoLinks
BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
☆141Updated 5 years ago
Alternatives and similar repositories for bismo
Users that are interested in bismo are comparing it to the libraries listed below
Sorting:
- ☆60Updated 5 years ago
- ☆72Updated 2 years ago
- ☆71Updated 5 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆224Updated 6 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 3 years ago
- Tool for optimize CNN blocking☆94Updated 5 years ago
- Train and deploy LUT-based neural networks on FPGAs☆98Updated last year
- Simulator for BitFusion☆101Updated 5 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆94Updated 4 years ago
- Residual Binarized Neural Network☆43Updated 7 years ago
- HLS implemented systolic array structure☆41Updated 7 years ago
- first-order deep learning accelerator model☆20Updated 7 years ago
- Designs for finalist teams of the DAC System Design Contest☆37Updated 5 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆48Updated 7 months ago
- RTL implementation of Flex-DPE.☆112Updated 5 years ago
- ☆30Updated 6 years ago
- A DSL for Systolic Arrays☆81Updated 6 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆167Updated last year
- Eyeriss chip simulator☆36Updated 5 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆149Updated 4 months ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆66Updated 4 years ago
- Approximate layers - TensorFlow extension☆27Updated 5 months ago
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆201Updated 5 years ago
- MAESTRO binary release☆22Updated 5 years ago
- Systolic-array based Deep Learning Accelerator generator☆27Updated 4 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆164Updated 3 years ago
- Vitis HLS Library for FINN☆208Updated last week
- MAERI public release☆31Updated 4 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago