Alternatives and similar repositories for bismo

Users that are interested in bismo are comparing it to the libraries listed below

• awai54st / LUTNet
  ☆63Updated 5 years ago
• hsharma35 / dnnweaver2
  Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
  ☆226Updated 6 years ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• UCLA-VAST / FlexCNN
  ☆72Updated 2 years ago
• xuanyoya / Interstellar-CNN-scheduler
  Tool for optimize CNN blocking
  ☆94Updated 5 years ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 8 years ago
• hsharma35 / bitfusion
  Simulator for BitFusion
  ☆102Updated 5 years ago
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆82Updated 6 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆59Updated 4 years ago
• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆95Updated 4 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆49Updated 9 months ago
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆115Updated 5 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 5 years ago
• cucapra / fodlam
  first-order deep learning accelerator model
  ☆21Updated 8 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆102Updated last year
• mohaghasemzadeh / ReBNet
  Residual Binarized Neural Network
  ☆43Updated 7 years ago
• tissue3 / EyerissSimulator
  Eyeriss chip simulator
  ☆39Updated 5 years ago
• Yang-YiFan / DiracDeltaNet
  PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs
  ☆33Updated 6 years ago
• hyoukjun / MAESTRO
  MAESTRO binary release
  ☆22Updated 6 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)
  ☆168Updated 2 years ago
• maeri-project / MAERI_bsv_isca2018
  MAERI public release
  ☆31Updated 4 years ago
• pulp-platform / stream-ebpc
  Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…
  ☆24Updated 5 years ago
• ehw-fit / tf-approximate
  Approximate layers - TensorFlow extension
  ☆26Updated 7 months ago
• SingularityKChen / dl_accelerator
  Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions
  ☆204Updated 5 years ago
• DNN-Accelerators / Open-Source-IPs
  ☆35Updated 6 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 4 years ago
• groupsada / DeepBurning
  Automatic generation of FPGA-based learning accelerators for the neural network family
  ☆66Updated 5 years ago
• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆153Updated 6 months ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆210Updated 2 months ago
• CSL-KU / firesim-nvdla
  FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud
  ☆164Updated 3 years ago