CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)
☆36Apr 13, 2025Updated last year
Alternatives and similar repositories for CircuitFusion
Users that are interested in CircuitFusion are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph (DAC'25)☆25Dec 21, 2025Updated 3 months ago
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆58Oct 28, 2024Updated last year
- ☆13Jan 20, 2023Updated 3 years ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization☆44May 29, 2025Updated 10 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- This is a repo to store circuit design datasets☆19Jan 17, 2024Updated 2 years ago
- This is a python repo for flattening Verilog☆20Dec 19, 2025Updated 4 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆71May 29, 2025Updated 10 months ago
- ☆17Nov 19, 2023Updated 2 years ago
- SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model☆16Jan 29, 2024Updated 2 years ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Aug 25, 2024Updated last year
- A circuit-element level explainer to explain machine learning model's prediction on chip layouts.☆18Oct 30, 2023Updated 2 years ago
- Collection for submission (Hardware Model Checking Benchmark)☆13Nov 9, 2025Updated 5 months ago
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆30Jan 7, 2026Updated 3 months ago
- Deploy open-source AI quickly and easily - Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- This repository includes the data and scripts utilized in the study titled "Improving LLM-based Verilog Code Generation with Data Augment…☆14Mar 24, 2025Updated last year
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- An open-source benchmark for generating design RTL with natural language☆183Nov 8, 2024Updated last year
- A SystemVerilog Assertion dataset to improve hardware verification with LLMs.☆25Jun 9, 2025Updated 10 months ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆58Jan 8, 2025Updated last year
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 10 months ago
- MAGE: A Multi-Agent Engine for Automated RTL Code Generation☆102Apr 11, 2025Updated last year
- DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"☆20Dec 10, 2024Updated last year
- Problems and Results of IWLS 2023 Programming Contest☆17Apr 12, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.☆281Feb 9, 2025Updated last year
- GPU-based logic synthesis tool☆101Mar 31, 2026Updated 2 weeks ago
- DeepIC3: Guiding IC3 Algorithms by Graph Neural Network Clause Prediction (ASP-DAC 2024)☆13Nov 2, 2023Updated 2 years ago
- [DATE 2025] haven: hallucination-mitigated llm for verilog code generation aligned with hdl engineers☆39Jul 9, 2025Updated 9 months ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆26Apr 9, 2025Updated last year
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆18Dec 18, 2023Updated 2 years ago
- Logic Synthesis System from UC Berkeley (Unofficial Distribution)☆15Jun 4, 2019Updated 6 years ago
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission☆12Jul 4, 2025Updated 9 months ago
- DeepGate3 for ICCAD2024☆14May 26, 2025Updated 10 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- GNN-RE datasets for circuit recognition☆59May 16, 2023Updated 2 years ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆42Jul 17, 2024Updated last year
- Equivalence checking with Yosys☆59Apr 9, 2026Updated last week
- Logic optimization and technology mapping tool.☆20Oct 12, 2023Updated 2 years ago
- LLM Evaluation Benchmark on Hardware Formal Verification☆41Apr 3, 2025Updated last year
- Research paper based on or related to ABC.☆72Jan 19, 2026Updated 3 months ago
- ☆19Dec 21, 2020Updated 5 years ago