Control Logic Synthesis: Drawing the Rest of the OWL
☆13Jun 17, 2024Updated last year
Alternatives and similar repositories for owl
Users that are interested in owl are comparing it to the libraries listed below
Sorting:
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆22Oct 31, 2024Updated last year
- Using e-graphs for logic synthesis (ICCAD'25)☆32Updated this week
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated 11 months ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Aug 25, 2024Updated last year
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆23May 24, 2025Updated 9 months ago
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- egraph <-> json☆16Dec 29, 2025Updated 2 months ago
- ☆16Jul 3, 2023Updated 2 years ago
- ☆17Mar 26, 2025Updated 11 months ago
- LLM4HWDesign Starting Toolkit☆19Oct 4, 2024Updated last year
- ☆40Jan 22, 2026Updated last month
- Egraphs Modulo Theories☆18Jun 10, 2025Updated 8 months ago
- Refreshing automation for inductive equational proofs using e-graphs☆24Jul 7, 2024Updated last year
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆25Apr 9, 2025Updated 10 months ago
- A Python-like programming language for testing and experimenting with concurrent programs.☆32Feb 20, 2026Updated last week
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- A web IDE for ACL2 using a Kubernetes based backend. Evolution of https://github.com/calebegg/proof-pad-classic☆11Jul 15, 2024Updated last year
- [FCCM 2023] PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs☆13Jun 26, 2025Updated 8 months ago
- Integer Multiplier Generator for Verilog☆24Jul 4, 2025Updated 7 months ago
- A unified programming framework for high and portable performance across FPGAs and GPUs☆11Mar 23, 2025Updated 11 months ago
- Connecting bv_decide to SMTLIB.☆13Jan 5, 2026Updated last month
- A tool for formally verifying constant-time software against hardware 🕰️☆14Feb 1, 2025Updated last year
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆29Jan 7, 2026Updated last month
- Tools for manipulating CHC and related files☆15Apr 21, 2023Updated 2 years ago
- SATZilla SAT feature extraction tool☆11Jan 15, 2026Updated last month
- A Lean implementation of Interaction Trees☆15Jan 13, 2025Updated last year
- AMulet 2. - A better AIG Multiplier Examination Tool☆26Dec 23, 2025Updated 2 months ago
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆33Apr 13, 2025Updated 10 months ago
- ☆24Nov 10, 2020Updated 5 years ago
- ☆26Feb 11, 2026Updated 2 weeks ago
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission☆11Jul 4, 2025Updated 7 months ago
- Unified Maude model-checking tool☆13Feb 4, 2026Updated 3 weeks ago
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated 11 months ago
- ☆15Nov 26, 2024Updated last year
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆36Jan 16, 2025Updated last year
- A toy compiler for NumPy array expressions that uses e-graphs and MLIR☆117Aug 11, 2025Updated 6 months ago
- A retargetable and extensible synthesis-based compiler for modern hardware architectures☆17Nov 20, 2025Updated 3 months ago
- ☆13Jan 20, 2023Updated 3 years ago