Alternatives and similar repositories for APPLE

Users that are interested in APPLE are comparing it to the libraries listed below

• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆50Updated 3 weeks ago
• ieee-ceda-datc / datc-rdf-Metrics4ML
  ☆31Updated 3 years ago
• CODA-Team / AnalogGym
  ☆48Updated 3 weeks ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆39Updated last year
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆37Updated 5 years ago
• TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-Contest
  ☆29Updated last year
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 4 years ago
• Yu-Maryland / Verilog-to-PyG
  ☆25Updated last year
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆59Updated last month
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆23Updated 7 months ago
• ASU-VDA-Lab / ASP-DAC24-Tutorial
  This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024
  ☆50Updated 5 months ago
• hkust-zhiyao / RTL-Timer
  Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization
  ☆29Updated 3 weeks ago
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆45Updated 2 weeks ago
• IntelLabs / FloorSet
  ☆72Updated 2 weeks ago
• NVlabs / INSTA
  ☆59Updated last week
• lamda-bbo / Open3DBench
  Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".
  ☆30Updated 2 weeks ago
• ABKGroup / PROBE3.0
  ☆44Updated last year
• Ravenslofty / librecell
  ☆24Updated 4 years ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆58Updated last year
• LQY404 / EDA-info
  the awesome work, project and lab of EDA (Electronic Design Automation). continue update...
  ☆23Updated 9 months ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆31Updated 5 years ago
• NVlabs / CircuitOps
  ☆81Updated 2 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆81Updated this week
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆56Updated 4 years ago
• Daikon-Sun / Physical-Design-for-Nanometer-ICs
  Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)
  ☆41Updated 6 years ago
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆27Updated last year
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆88Updated 4 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆136Updated 2 years ago
• JBlocklove / LLMs-for-EDA-Tutorial
  ☆52Updated last month
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆73Updated 7 years ago