Alternatives and similar repositories for HOGA:

Users that are interested in HOGA are comparing it to the libraries listed below

• Yu-Maryland / Gamora
  Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)
  ☆50Updated 4 months ago
• UCLA-VAST / GNN-DSE
  DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"
  ☆40Updated last year
• pku-dasys / easymac
  ☆16Updated 3 years ago
• cornell-zhang / GLAIVE
  Graph-learning assisted instruction vulnerability estimation published in DATE 2020
  ☆13Updated 4 years ago
• UCLA-VAST / HARP
  ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS
  ☆18Updated 11 months ago
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆51Updated 2 years ago
• cornell-zhang / SPADE
  ☆11Updated 3 years ago
• cornell-zhang / uptune
  A Generic Distributed Auto-Tuning Infrastructure
  ☆22Updated 3 years ago
• yaoxufeng / RTLRewriter-Bench
  ☆31Updated 11 months ago
• sjtu-zhao-lab / hierarchical-gnn-for-hls
  DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"
  ☆17Updated 5 months ago
• Yu-Maryland / Verilog-to-PyG
  ☆25Updated last year
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆47Updated 7 months ago
• lydiawunan / HLS-Perf-Prediction-with-GNNs
  High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing
  ☆51Updated 11 months ago
• Yu-Maryland / Differentiable_Scheduler_ICML24
  Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.
  ☆21Updated 6 months ago
• Entropy-xcy / sns
  ☆15Updated 2 years ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆58Updated 7 months ago
• zlinaf / PowerGear
  [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
  ☆17Updated 3 years ago
• HKUST-GZ-VLSI / Design-Dataset
  This is a repo to store circuit design datasets
  ☆17Updated last year
• cornell-zhang / datuner
  DATuner Repository
  ☆18Updated 6 years ago
• HKUSTGZ-MICS-LYU / FlattenRTL
  This is a python repo for flattening Verilog
  ☆16Updated last month
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆50Updated last month
• cure-lab / DeepGate
  This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".
  ☆21Updated last year
• yzwangfeng / reram-synthesis
  A synthesis flow for hybrid processing-in-RRAM modes
  ☆12Updated 3 years ago
• Gy-Hu / E-Syn
  E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)
  ☆29Updated 9 months ago
• UCLA-DM / HLSyn
  HLSyn benchmark for paper "Towards a Comprehensive Benchmark for FPGA Targeted High-Level Synthesis"
  ☆29Updated last year
• synergy-noc-generators / Proteus
  ☆10Updated 2 years ago
• icgrp / hipr
  ☆15Updated 2 years ago
• UT-LCA / ML4Accel-Dataset
  Dataset for ML-guided Accelerator Design
  ☆36Updated 5 months ago
• sharc-lab / HLSFactory
  HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
  ☆34Updated 2 weeks ago
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆29Updated this week