sjtu-zhao-lab / hierarchical-gnn-for-hls
DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"
☆15Updated 2 months ago
Alternatives and similar repositories for hierarchical-gnn-for-hls:
Users that are interested in hierarchical-gnn-for-hls are comparing it to the libraries listed below
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆41Updated 5 months ago
- ☆22Updated 7 months ago
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆23Updated 3 months ago
- [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs☆17Updated 2 years ago
- An Open-Source Tool for CGRA Accelerators☆18Updated 10 months ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆14Updated last year
- ☆42Updated this week
- An Open-Source Tool for CGRA Accelerators☆58Updated last month
- ☆16Updated 3 years ago
- An integrated CGRA design framework☆85Updated 3 months ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆49Updated last month
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆26Updated 5 months ago
- Dataset for ML-guided Accelerator Design☆34Updated 3 months ago
- Template-based Reconfigurable Architecture Modeling Framework☆14Updated 2 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆57Updated 4 months ago
- ☆40Updated last week
- High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing☆47Updated 8 months ago
- This is a python repo for flattening Verilog☆15Updated last month
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆28Updated 3 weeks ago
- ☆25Updated 9 months ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆68Updated 3 years ago
- ☆14Updated 2 years ago
- A portable framework to map DFG (dataflow graph, representing an application) on spatial accelerators.☆36Updated 2 years ago
- ☆9Updated 2 years ago
- The open-sourced version of BOOM-Explorer☆36Updated last year
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆59Updated 2 months ago
- ☆14Updated 2 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆118Updated 2 weeks ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated last year
- A list of our chiplet simulaters☆28Updated 3 years ago