JKomp / AIGER
Python version of tools to work with AIG formatted files
☆10Updated 10 months ago
Alternatives and similar repositories for AIGER:
Users that are interested in AIGER are comparing it to the libraries listed below
- Random Generator of Btor2 Files☆9Updated last year
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆28Updated 8 months ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆24Updated 2 years ago
- ☆11Updated 3 years ago
- ☆13Updated 4 years ago
- QuteRTL: A RTL Front-End Towards Intelligent Synthesis and Verification☆14Updated 8 years ago
- ☆12Updated 2 years ago
- ☆16Updated 4 years ago
- ☆17Updated 8 months ago
- ☆13Updated last year
- Logic Synthesis System from UC Berkeley (Unofficial Distribution)☆15Updated 5 years ago
- BTOR2 MLIR project☆25Updated last year
- RISC-V Formal in Chisel☆11Updated 11 months ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆17Updated 5 months ago
- ☆15Updated 2 years ago
- ☆11Updated 2 years ago
- py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).☆42Updated 3 months ago
- Hardware Model Checker☆40Updated this week
- Integer Multiplier Generator for Verilog☆22Updated last year
- ☆11Updated 4 years ago
- PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…☆20Updated 2 months ago
- A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core☆12Updated 5 years ago
- A Formal Verification Framework for Chisel☆18Updated 11 months ago
- DeepIC3: Guiding IC3 Algorithms by Graph Neural Network Clause Prediction (ASP-DAC 2024)☆11Updated last year
- Automatic generation of architecture-level models for hardware from its RTL design.☆14Updated last year
- ☆14Updated 6 years ago
- Awesome machine learning for logic synthesis☆25Updated 2 years ago
- A generic parser and tool package for the BTOR2 format.☆40Updated 3 months ago
- This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".☆21Updated last year