BUPT-GAMMA / PolarGateLinks
☆13Updated last year
Alternatives and similar repositories for PolarGate
Users that are interested in PolarGate are comparing it to the libraries listed below
Sorting:
- ☆31Updated 2 years ago
- DeepGate3 for ICCAD2024☆13Updated 6 months ago
- ☆26Updated last year
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆140Updated 4 months ago
- ☆16Updated 2 years ago
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆28Updated 7 months ago
- Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability.☆70Updated 5 months ago
- ☆13Updated 2 years ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆59Updated 6 months ago
- This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".☆24Updated 2 years ago
- Research paper based on or related to ABC.☆62Updated 3 weeks ago
- LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models☆25Updated 3 years ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆55Updated 11 months ago
- Awesome Artificial Intelligence for Electronic Design Automation Papers.☆188Updated last year
- Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".☆70Updated 5 months ago
- ☆41Updated last year
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆33Updated last year
- This is the code for our paper "Reinforcement Learning within Tree Search for Fast Macro Placement".☆34Updated last year
- ☆45Updated 2 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆84Updated last year
- MLCAD 2020: Reinforcement for logic optimization sequence exploration☆28Updated 5 years ago
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆38Updated 4 months ago
- DeepIC3: Guiding IC3 Algorithms by Graph Neural Network Clause Prediction (ASP-DAC 2024)☆11Updated 2 years ago
- ☆15Updated last year
- EPFL logic synthesis benchmarks☆220Updated 3 weeks ago
- This is a deep-learning based model for Electronic Design Automation(EDA), predicting the congestion location.☆21Updated last year
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆58Updated 5 months ago
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆44Updated last year
- Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes☆76Updated 2 weeks ago
- Simple Python interface for ABC☆26Updated 2 years ago