chipsalliance / Cores-VeeR-EH2Links
☆240Updated 2 years ago
Alternatives and similar repositories for Cores-VeeR-EH2
Users that are interested in Cores-VeeR-EH2 are comparing it to the libraries listed below
Sorting:
- VeeR EL2 Core☆292Updated last week
- FuseSoC-based SoC for VeeR EH1 and EL2☆321Updated 7 months ago
- RISC-V Debug Support for our PULP RISC-V Cores☆265Updated 3 months ago
- RISC-V CPU Core☆359Updated last month
- Instruction Set Generator initially contributed by Futurewei☆290Updated last year
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆218Updated 4 years ago
- Silicon-validated SoC implementation of the PicoSoc/PicoRV32☆272Updated 5 years ago
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆516Updated 5 months ago
- RISC-V Torture Test☆195Updated last year
- ☆293Updated 3 weeks ago
- RISC-V RV64GC emulator designed for RTL co-simulation☆229Updated 8 months ago
- 4 stage, in-order, compute RISC-V core based on the CV32E40P☆240Updated 8 months ago
- ☆334Updated 10 months ago
- CORE-V Family of RISC-V Cores☆283Updated 5 months ago
- This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.☆182Updated 2 weeks ago
- Documentation for the OpenHW Group's set of CORE-V RISC-V cores☆218Updated 2 months ago
- This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…☆436Updated 2 months ago
- Verilog Configurable Cache☆180Updated 8 months ago
- ☆182Updated last year
- ☆89Updated 4 months ago
- Basic RISC-V Test SoC☆138Updated 6 years ago
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆271Updated this week
- Code used in☆193Updated 8 years ago
- Advanced Interface Bus (AIB) die-to-die hardware open source☆140Updated 10 months ago
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 5 years ago
- Tile based architecture designed for computing efficiency, scalability and generality☆263Updated last month
- A Fast, Low-Overhead On-chip Network☆216Updated last week
- An Open-Source Design and Verification Environment for RISC-V☆83Updated 4 years ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆171Updated 8 months ago
- ☆141Updated last year