☆148Feb 29, 2024Updated 2 years ago
Alternatives and similar repositories for riscv-code-size-reduction
Users that are interested in riscv-code-size-reduction are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- RISC-V cryptography extensions standardisation work.☆410Mar 7, 2026Updated 5 months ago
- ☆44Nov 4, 2024Updated last year
- RISC-V Debug Specification Standard☆524Jul 21, 2026Updated 3 weeks ago
- Working draft of the proposed RISC-V Bitmanipulation extension☆219Mar 20, 2024Updated 2 years ago
- RISC-V Configuration Validator☆82Apr 16, 2026Updated 3 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains☆153Aug 3, 2026Updated last week
- Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)☆299Updated this week
- ☆91Aug 26, 2025Updated 11 months ago
- 4 stage, in-order, secure RISC-V core based on the CV32E40P☆162Oct 31, 2024Updated last year
- Documentation for the OpenHW Group's set of CORE-V RISC-V cores☆230Jan 11, 2026Updated 7 months ago
- ☆12Feb 15, 2024Updated 2 years ago
- ☆36Nov 4, 2024Updated last year
- RISC-V Architecture Profiles☆192Jul 21, 2026Updated 3 weeks ago
- RISC-V Opcodes☆873Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- The RISC-V Architectural Certification Tests (ACTs) are a set of assembly language tests designed to certify that a design faithfully imp…☆768Updated this week
- RISC-V Packed SIMD Extension☆178Updated this week
- RISC-V Processor Trace Specification☆220Aug 4, 2026Updated last week
- RISC-V Profiles and Platform Specification☆116Sep 6, 2023Updated 2 years ago
- 4 stage, in-order, compute RISC-V core based on the CV32E40P☆277Nov 6, 2024Updated last year
- pulp_soc is the core building component of PULP based SoCs☆85Jul 17, 2026Updated 3 weeks ago
- Sail RISC-V model☆749Updated this week
- RISC-V backports for binutils-gdb. Development is done upstream at the FSF.☆152Jul 7, 2022Updated 4 years ago
- ☆38Sep 15, 2021Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,274May 29, 2026Updated 2 months ago
- The ISA specification for the ZiCondOps extension.☆19Mar 21, 2024Updated 2 years ago
- The main Embench repository☆329Feb 13, 2026Updated 6 months ago
- VeeR EH2 core☆275Jul 20, 2026Updated 3 weeks ago
- ☆378Updated this week
- VeeR EL2 Core☆343Updated this week
- RISC-V Debug Support for our PULP RISC-V Cores☆321Updated this week
- Functional verification project for the CORE-V family of RISC-V cores.☆709Updated this week
- Working draft of the proposed RISC-V V vector extension☆1,088Mar 17, 2024Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- IOMMU IP compliant with the RISC-V IOMMU Specification v1.0☆120Sep 24, 2025Updated 10 months ago
- CHERI-RISC-V model written in Sail☆68Updated this week
- RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions☆91Apr 1, 2026Updated 4 months ago
- RISC-V Proxy Kernel☆705Oct 2, 2025Updated 10 months ago
- Instruction Set Generator initially contributed by Futurewei☆312Oct 17, 2023Updated 2 years ago
- RISC-V Configuration Structure☆41Oct 30, 2024Updated last year
- Fork of OpenOCD that has RISC-V support☆518Jul 17, 2026Updated 3 weeks ago