adamgallas / fpga_accelerator_yolov3tiny
☆231Updated last year
Alternatives and similar repositories for fpga_accelerator_yolov3tiny:
Users that are interested in fpga_accelerator_yolov3tiny are comparing it to the libraries listed below
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆102Updated last year
- Implement Tiny YOLO v3 on ZYNQ☆290Updated 3 weeks ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆172Updated 6 months ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆323Updated 2 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆145Updated 2 years ago
- FPGA☆154Updated 10 months ago
- FPGA project☆219Updated 3 years ago
- 一个开源的FPGA神经网络加速器。☆161Updated last year
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆57Updated last year
- Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database☆496Updated 4 years ago
- ☆52Updated 2 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆76Updated 2 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆177Updated last year
- 2023集创赛紫光同创杯一等奖项目☆109Updated last year
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆90Updated last week
- some interesting demos for starters☆79Updated 2 years ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆78Updated 3 years ago
- 代码在这个库里 Code is here☆50Updated 5 months ago
- CNN accelerator implemented with Spinal HDL☆149Updated last year
- FPGA实现简单的图像处理算法☆44Updated 2 years ago
- 使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用☆550Updated 6 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆199Updated last year
- 基于FPGA的二维卷积识别任务☆23Updated 2 years ago
- HLS_YOLOV3☆26Updated last year
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆28Updated 3 years ago
- General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。☆44Updated 2 months ago
- ☆32Updated last year
- MNIST using tensorflow, c++ and fpga (zynq7010)☆26Updated 2 years ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆237Updated 6 years ago
- The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to rep…☆34Updated 10 months ago