quanzaihh / Neural-Network-AcceleratorLinks
A Convolutional Neural Network Accelerator implementation on FPGA, xilinx (xczu7ev-ffvc1156-2-i), The inference of yolov8 took 60ms.
☆331Updated 2 months ago
Alternatives and similar repositories for Neural-Network-Accelerator
Users that are interested in Neural-Network-Accelerator are comparing it to the libraries listed below
Sorting:
- 一个开源的FPGA 神经网络加速器。☆169Updated last year
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆183Updated 8 months ago
- ☆242Updated last year
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆114Updated last year
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆97Updated last week
- some interesting demos for starters☆81Updated 2 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆156Updated 2 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆337Updated 2 years ago
- 2023集创赛紫光同创杯一等奖项目☆119Updated last year
- ☆62Updated 2 years ago
- ☆37Updated 4 years ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆249Updated 6 years ago
- FPGA☆158Updated last year
- Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database☆517Updated 4 years ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆80Updated 4 years ago
- FPGA project☆222Updated 3 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆77Updated 2 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆183Updated last year
- Things to learn for new students in the Lab for AI chips and systems of BJTU .☆237Updated 8 months ago
- General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。☆56Updated 4 months ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆202Updated last year
- FPGA实现简单的图像处理算法☆47Updated 2 years ago
- 车牌识别,FPGA,2019全国大学生集成电路创新创业大赛☆140Updated 5 years ago
- CNN accelerator implemented with Spinal HDL☆150Updated last year
- 代码在这个库里 Code is here☆53Updated 7 months ago
- 清華大學 | 積體電路設計實驗 (IC LAB) | 110上☆41Updated 2 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆64Updated 6 years ago
- CPU Design Based on RISCV ISA☆117Updated last year
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆346Updated last year
- AXI协议规范中文翻译版☆153Updated 3 years ago