DFVG: A Heterogeneous Architecture for Speculative Decoding with Draft-on-FPGA and Verify-on-GPU.
☆27Nov 26, 2025Updated 9 months ago
Alternatives and similar repositories for DFVG
Users that are interested in DFVG are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [DATE'2025, TCAD'2025] Terafly : A Multi-Node FPGA Based Accelerator Design for Efficient Cooperative Inference in LLMs☆39Nov 13, 2025Updated 10 months ago
- TeLLMe: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs [FPGA2026]☆36Mar 11, 2026Updated 6 months ago
- CODO: An Automated Compiler for Comprehensive Dataflow Optimization☆37Jun 3, 2026Updated 3 months ago
- [FCCM 2026] Official repository for LUT-LLM: Efficient Language Model Inference with Memory-based Computation on FPGAs☆52Apr 12, 2026Updated 5 months ago
- XtraMAC code repo (Accepted by ISCA2026)☆29Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Ready-to-link, packaged Aurora IP on four QSFP28 lanes, providing 100Gb/s throughput, flow control and status monitoring☆19Sep 7, 2026Updated last week
- Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.☆20Dec 29, 2024Updated last year
- A hardware accelerator for General Matrix Multiply, developed in SystemC using ESP.☆20May 26, 2021Updated 5 years ago
- FSA: Fusing FlashAttention within a Single Systolic Array☆197Apr 15, 2026Updated 5 months ago
- Reconfigurable Stream Network Architecture☆18Aug 13, 2026Updated last month
- ☆38Nov 28, 2024Updated last year
- ☆32Mar 31, 2025Updated last year
- ☆26Apr 13, 2025Updated last year
- Model LLM inference on single-core dataflow accelerators☆22Dec 16, 2025Updated 8 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- [FPGA'26 Best Paper Nomination] CXL-SpecKV: A Disaggregated FPGA Speculative KV-Cache for Datacenter LLM Serving☆38Aug 7, 2026Updated last month
- Composable HLS library for rapid development of LLM accelerators. FlexLLM enables spatial-temporal hybrid architectures, with parameteriz…☆30Aug 17, 2026Updated 3 weeks ago
- A research shell for Alveo V80☆46Sep 8, 2026Updated last week
- ☆29Mar 19, 2026Updated 5 months ago
- Implementation of Microscaling data formats in SystemVerilog.☆34Jul 6, 2025Updated last year
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆62Nov 22, 2023Updated 2 years ago
- Collection of kernel accelerators optimised for LLM execution☆35Feb 26, 2026Updated 6 months ago
- Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts☆143May 10, 2024Updated 2 years ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆117Apr 26, 2025Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆33Mar 7, 2024Updated 2 years ago
- This is a series of quick start guide of Vitis HLS tool in Chinese. It explains the basic concepts and the most important optimize techni…☆25Nov 9, 2022Updated 3 years ago
- TMMA: A Tiled Matrix Multiplication Accelerator for Self-Attention Projections in Transformer Models, optimized for edge deployment on Xi…☆38Apr 7, 2026Updated 5 months ago
- 大三上做的本科毕设,包含BNN的替代梯度训练,verilog电路实现,完成180nm工艺流片。☆27Jun 30, 2025Updated last year
- MEEP FPGA Shell project, currently supporting Alveos u280 and u55c☆17Mar 14, 2024Updated 2 years ago
- ☆48Dec 28, 2023Updated 2 years ago
- [ICCAD 2025] Squant☆15Jul 3, 2025Updated last year
- MIPS R10000 architecture simulator with C++☆11Jun 8, 2023Updated 3 years ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆177Mar 12, 2026Updated 6 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆35Dec 22, 2025Updated 8 months ago
- FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.☆151Jan 20, 2025Updated last year
- ☆45Sep 2, 2026Updated last week
- ☆36Jun 11, 2026Updated 3 months ago
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆288Apr 1, 2024Updated 2 years ago
- Allo Accelerator Design and Programming Framework (PLDI'24)☆411Sep 8, 2026Updated last week
- Use FPGA to Transfer Image with Gigabits Ethernet☆19Dec 2, 2020Updated 5 years ago