huanggeli / yolov3tiny-ZYNQ7000Links
a Real-time image recognition project with RTL accelerator and ZYNQ Architecture
☆66Updated last year
Alternatives and similar repositories for yolov3tiny-ZYNQ7000
Users that are interested in yolov3tiny-ZYNQ7000 are comparing it to the libraries listed below
Sorting:
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆122Updated 2 years ago
- ☆248Updated last year
- Implement Tiny YOLO v3 on ZYNQ☆300Updated 5 months ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆79Updated 6 months ago
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆29Updated 3 years ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆82Updated 4 years ago
- ☆55Updated 2 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆198Updated 10 months ago
- FPGA实现动态图像识别☆22Updated 5 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆186Updated last year
- 帧差法运动目标检测,基于ZYNQ7020☆73Updated 4 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆165Updated 2 years ago
- Nuclei E203 with yolo accelerator based on xc7k325☆17Updated last year
- FPGA☆158Updated last year
- FPGA project☆229Updated 3 years ago
- 一个开源的FPGA神经网络加速器。☆176Updated 2 years ago
- Zynq/FPGA实现CNN手写数字(0-9)识别☆34Updated 9 months ago
- HLS_YOLOV3☆26Updated last year
- hls code zynq 7020 pynq z2 CNN☆82Updated 6 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆98Updated last year
- some interesting demos for starters☆84Updated 2 years ago
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆156Updated 4 years ago
- CNN Implemetation on ZYNQ-7010☆23Updated last year
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆238Updated 6 years ago
- FPGA实现简单的图像处理算法☆51Updated 2 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆348Updated 2 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆46Updated 5 years ago
- fpga跑sobel识别算法☆38Updated 4 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆79Updated 3 years ago
- yolov5-acceleration-fpga☆10Updated 2 months ago