xiying-boy / yolov3-AX7350Links
HLS_YOLOV3
☆25Updated last year
Alternatives and similar repositories for yolov3-AX7350
Users that are interested in yolov3-AX7350 are comparing it to the libraries listed below
Sorting:
- ☆55Updated 2 years ago
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆29Updated 3 years ago
- ☆251Updated last year
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆126Updated 2 years ago
- Implement Tiny YOLO v3 on ZYNQ☆300Updated 5 months ago
- FPGA☆158Updated last year
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆67Updated last year
- 基于FPGA量化的人脸口罩检测☆24Updated 4 years ago
- Vitis AI Lab: MNIST classifier☆19Updated 3 years ago
- some interesting demos for starters☆84Updated 2 years ago
- Nuclei E203 with yolo accelerator based on xc7k325☆17Updated last year
- hls code zynq 7020 pynq z2 CNN☆84Updated 6 years ago
- FPGA实现动态图像识别☆23Updated 5 years ago
- FPGA project☆229Updated 3 years ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆83Updated 4 years ago
- 可运行☆37Updated 3 years ago
- General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。☆70Updated 7 months ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆199Updated 11 months ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆167Updated 2 years ago
- A DNN Accelerator implemented with RTL.☆67Updated 9 months ago
- CNN accelerator implemented with Spinal HDL☆152Updated last year
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆188Updated last year
- 一个开源的FPGA神经网络加速器。☆179Updated 2 years ago
- FPGA/AES/LeNet/VGG16☆108Updated 7 years ago
- ☆32Updated 4 years ago
- using xilinx xc6slx45 to implement mnist net☆83Updated 7 years ago
- yolov5-acceleration-fpga☆10Updated 3 months ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆99Updated last year
- Codes to implement MobileNet V2 in a FPGA☆27Updated 4 years ago
- An LeNet RTL implement onto FPGA☆49Updated 7 years ago