Alternatives and similar repositories for yolov3-AX7350

Users that are interested in yolov3-AX7350 are comparing it to the libraries listed below

• xbdxwyh / yolov3_fpga_project
  ☆56Updated 2 years ago
• matsuda-slab / YOLO_ZYNQ_MASTER
  Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA
  ☆30Updated 3 years ago
• adamgallas / fpga_accelerator_yolov3tiny
  [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition
  ☆261Updated last year
• Yu-Zhewen / Tiny_YOLO_v3_ZYNQ
  Implement Tiny YOLO v3 on ZYNQ
  ☆310Updated 8 months ago
• bunny965 / yolov5-fpga-hardware-acceleration
  网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR
  ☆136Updated 2 years ago
• huanggeli / yolov3tiny-ZYNQ7000
  a Real-time image recognition project with RTL accelerator and ZYNQ Architecture
  ☆66Updated last year
• vivian13maker / The-advanced-work-of-Object-detection-based-on-FPGAs
  ☆33Updated 4 years ago
• MasLiang / CNN-On-FPGA
  FPGA
  ☆159Updated last year
• qixingzhang / SummerSchool2022-Vitis-AI
  Vitis AI Lab: MNIST classifier
  ☆19Updated 3 years ago
• qing-2 / PYNQ-YOLOv2
  可运行
  ☆39Updated 3 years ago
• Zero0Hero / yolo_e203_fpga
  Nuclei E203 with yolo accelerator based on xc7k325
  ☆19Updated last year
• ZLkanyo009 / Yolo-compression-and-deployment-in-FPGA
  基于FPGA量化的人脸口罩检测
  ☆24Updated 4 years ago
• doveyour / mnist-nnet-hls-zynq7020-fpga
  to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…
  ☆85Updated 4 years ago
• bird1and1fish / Frame_Difference
  FPGA实现动态图像识别
  ☆23Updated 5 years ago
• cxlisme / FPGA-proj
  FPGA project
  ☆234Updated 3 years ago
• XueTianyu24 / cnn_accelerator
  【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器
  ☆174Updated 2 years ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆89Updated 6 years ago
• cspool / yolov5-accel
  yolov5-acceleration-fpga
  ☆10Updated 5 months ago
• user-xleo / DNN-Accelerator
  A DNN Accelerator implemented with RTL.
  ☆68Updated 11 months ago
• GuoningHuang / FPGA-CNN-accelerator-based-on-systolic-array
  2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器，支持yolov3-tiny的第一层卷积层计算，可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。
  ☆215Updated 2 months ago
• andre1araujo / YOLO-on-PYNQ-Z2
  This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…
  ☆94Updated 9 months ago
• Futuresxy / General-CNN-Accelerator
  General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。
  ☆84Updated 9 months ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆109Updated 7 years ago
• ignperez-udec / MobileNet-V2-inference-HLS
  Codes to implement MobileNet V2 in a FPGA
  ☆28Updated 5 years ago
• papcjy / mnist_fpga
  using xilinx xc6slx45 to implement mnist net
  ☆84Updated 7 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆48Updated 5 years ago
• xddcore / OpenNNA
  一个开源的FPGA神经网络加速器。
  ☆185Updated 2 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆191Updated last year
• 19801201 / SpinalHDL_CNN_Accelerator
  CNN accelerator implemented with Spinal HDL
  ☆155Updated last year
• YutongChenVictor / Fpga-accelerator-demos
  some interesting demos for starters
  ☆93Updated 3 years ago