[TVLSI'23] This repository contains the source code for the paper "FireFly: A High-Throughput Hardware Accelerator for Spiking Neural Networks with Efficient DSP and Memory Optimization"
☆26Aug 13, 2026Updated 2 months ago
Alternatives and similar repositories for FireFly-v1
Users that are interested in FireFly-v1 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆28May 9, 2024Updated 2 years ago
- [FPL'24] This repository contains the source code for the paper “Revealing Untapped DSP Optimization Potentials for FPGA-based Systolic M…☆23May 6, 2024Updated 2 years ago
- ☆17Jul 10, 2024Updated 2 years ago
- RISC-V-based many-core neuromorphic architecture☆18Aug 1, 2026Updated 2 months ago
- ☆27Jan 22, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- An Open-Source Processor for Accelerating Spiking Neural Network☆14Sep 30, 2022Updated 4 years ago
- Update papers about the Accelerators for Spiking Neural Networks.☆21Mar 20, 2024Updated 2 years ago
- [DATE'25, ICCAD'25] An embedded FPGA-based LLM accelerator capable of supporting Llama2-7B☆218Jul 30, 2026Updated 2 months ago
- Accelerate multihead attention transformer model using HLS for FPGA☆13Dec 7, 2023Updated 2 years ago
- FPGA-based SNN Accelerator Toy☆48Apr 17, 2026Updated 6 months ago
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆295Apr 1, 2024Updated 2 years ago
- TeLLMe: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs [FPGA2026]☆39Mar 11, 2026Updated 7 months ago
- syn script for DC Compiler☆15May 15, 2022Updated 4 years ago
- [DATE'2025, TCAD'2025] Terafly : A Multi-Node FPGA Based Accelerator Design for Efficient Cooperative Inference in LLMs☆41Nov 13, 2025Updated 11 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Collection of kernel accelerators optimised for LLM execution☆35Feb 26, 2026Updated 7 months ago
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆34Mar 7, 2024Updated 2 years ago
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆41Jul 4, 2023Updated 3 years ago
- An open-source 3D IC design platform that leverages existing open EDA tools while incorporating tailored abstractions and customizations …☆18Oct 29, 2024Updated last year
- ☆14Oct 22, 2023Updated 2 years ago
- Model LLM inference on single-core dataflow accelerators☆22Dec 16, 2025Updated 10 months ago
- Composable HLS library for rapid development of LLM accelerators. FlexLLM enables spatial-temporal hybrid architectures, with parameteriz…☆33Aug 17, 2026Updated 2 months ago
- Fully opensource spiking neural network accelerator☆179Feb 13, 2023Updated 3 years ago
- （Not actively updating）Vision Transformer Accelerator implemented in Vivado HLS for Xilinx FPGAs.☆26Dec 29, 2024Updated last year
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Hardware and software implementation of Sparsely-active SNNs☆26Mar 6, 2026Updated 7 months ago
- LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.☆21Mar 19, 2025Updated last year
- 第四届全国大学生嵌入式比赛SoC☆12Apr 1, 2022Updated 4 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Jan 6, 2023Updated 3 years ago
- 3D-FPIM: An Extreme Energy-Efficient DNN Acceleration System Using 3D NAND Flash-Based In-Situ PIM Unit (MICRO 2022)☆29May 19, 2023Updated 3 years ago
- tpu-systolic-array-weight-stationary☆26May 7, 2021Updated 5 years ago
- Energy-efficient Event-driven Spiking Neural Network accelerator for FPGA with PyTorch integration☆141Aug 28, 2026Updated last month
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆38Mar 12, 2026Updated 7 months ago
- [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning☆142Aug 27, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A bit-level sparsity-awared multiply-accumulate process element.☆21Jul 9, 2024Updated 2 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆65Jul 28, 2021Updated 5 years ago
- A Spiking Neuron Network Project in Verilog Implementation☆28Apr 5, 2018Updated 8 years ago
- Demo Sources for Learning Spinal HDL☆17Dec 5, 2022Updated 3 years ago
- Quad cluster of RISC-V cores with peripherals and local memory☆24Feb 3, 2022Updated 4 years ago
- A Visual RISC-V Simulator☆17Nov 7, 2023Updated 2 years ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆43Jul 2, 2026Updated 3 months ago