doveyour / mnist-nnet-hls-zynq7020-fpgaView external linksLinks
to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj accelerate code in FPGA,and implacement in block design and with SDK app......
☆87May 30, 2021Updated 4 years ago
Alternatives and similar repositories for mnist-nnet-hls-zynq7020-fpga
Users that are interested in mnist-nnet-hls-zynq7020-fpga are comparing it to the libraries listed below
Sorting:
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆88Aug 6, 2022Updated 3 years ago
- Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database☆575Feb 19, 2021Updated 4 years ago
- This project implemented an unoptimized simple convolutional neural network in ZYNQ's PL and realized data transmission through axidma dr…☆12Aug 5, 2018Updated 7 years ago
- Implement Tiny YOLO v3 on ZYNQ☆307Apr 14, 2025Updated 10 months ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Feb 10, 2026Updated last week
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆66Apr 8, 2024Updated last year
- ☆56Apr 19, 2023Updated 2 years ago
- Simulating implement of vgg16 network on Zynq-7020 FPGA☆43Mar 11, 2019Updated 6 years ago
- hls code zynq 7020 pynq z2 CNN☆89Mar 15, 2019Updated 6 years ago
- Spiking neural network for Zynq devices with Vivado HLS☆38Feb 21, 2018Updated 7 years ago
- Zynq/FPGA实现CNN手写数字(0-9)识别☆38Dec 14, 2024Updated last year
- PYNQ-Based MNIST with Tensorflow Lite☆21Feb 21, 2025Updated 11 months ago
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆890Jul 29, 2024Updated last year
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆21Jun 3, 2019Updated 6 years ago
- The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through r…☆11Sep 30, 2020Updated 5 years ago
- Codes to implement MobileNet V2 in a FPGA☆28Dec 21, 2020Updated 5 years ago
- FPGA Accelerator for CNN using Vivado HLS☆331Oct 25, 2021Updated 4 years ago
- Generate an FPGA design for a TWN☆10Nov 4, 2019Updated 6 years ago
- This repository contains a SDSoC Project which includes an implementation of a 3-layered artificial neural network (testphase only). It c…☆12Oct 7, 2016Updated 9 years ago
- 哈尔滨工业大学（深圳）2021年球季学期深度学习体系结构实验☆17Oct 1, 2022Updated 3 years ago
- [ICTA'21] First Prize Winner of the 2021 DIGILENT Cup, China College Integrated Circuit Competition☆267Apr 1, 2024Updated last year
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Jan 9, 2019Updated 7 years ago
- ☆31Nov 7, 2024Updated last year
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆54Aug 20, 2018Updated 7 years ago
- A linear array of PEs with RISC-V ISA targeting extreme high frequency on Xilinx ZYNQ Ultrascale+, specificially for applications such as…☆13Jun 4, 2024Updated last year
- Simulating implement of LeNet network on Zynq-7020 FPGA☆30Mar 11, 2019Updated 6 years ago
- FPGA project☆237Apr 5, 2022Updated 3 years ago
- ☆19Sep 12, 2022Updated 3 years ago
- ⚙️ 基于 Zynq-7 全可编程 SoC 的设计☆38Dec 31, 2021Updated 4 years ago
- IIR Lowpass Filter☆13Jan 12, 2018Updated 8 years ago
- ☆16Apr 6, 2022Updated 3 years ago
- ☆36Sep 17, 2024Updated last year
- 帧差法运动目标检测，基于ZYNQ7020☆82Jul 9, 2021Updated 4 years ago
- Nuclei E203 with yolo accelerator based on xc7k325☆19Jul 19, 2024Updated last year
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆105Dec 14, 2023Updated 2 years ago
- FPGA and GPU acceleration of LeNet5☆35Jul 9, 2019Updated 6 years ago
- High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.☆41Jul 25, 2024Updated last year
- Eyeriss‑V1 CNN Hardware Accelerator (Verilog) fully parametric. This repository contains the complete Verilog implementation of a functio…☆26Apr 7, 2025Updated 10 months ago
- CS4362 - Hardware Description Languages. Implemented SNN on an FPGA for real-time image processing using VHDL☆23Dec 29, 2023Updated 2 years ago