doveyour / mnist-nnet-hls-zynq7020-fpgaLinks
to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj accelerate code in FPGA,and implacement in block design and with SDK app......
☆80Updated 4 years ago
Alternatives and similar repositories for mnist-nnet-hls-zynq7020-fpga
Users that are interested in mnist-nnet-hls-zynq7020-fpga are comparing it to the libraries listed below
Sorting:
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆116Updated 2 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆78Updated 3 years ago
- FPGA project☆224Updated 3 years ago
- FPGA☆158Updated last year
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆64Updated last year
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆159Updated 2 years ago
- 一个开源的FPGA神经网络加速器。☆172Updated last year
- ☆246Updated last year
- some interesting demos for starters☆82Updated 2 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆191Updated 9 months ago
- 帧差法运动目标检测,基于ZYNQ7020☆71Updated 4 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆342Updated 2 years ago
- ☆54Updated 2 years ago
- Nuclei E203 with yolo accelerator based on xc7k325☆14Updated last year
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆186Updated last year
- Implement Tiny YOLO v3 on ZYNQ☆298Updated 4 months ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆202Updated 2 years ago
- MNIST using tensorflow, c++ and fpga (zynq7010)☆25Updated 2 years ago
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆151Updated 4 years ago
- 2023集创赛紫光同创杯一等奖项目☆120Updated last year
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆37Updated 5 years ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆74Updated 5 months ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆238Updated 6 years ago
- hls code zynq 7020 pynq z2 CNN☆83Updated 6 years ago
- FPGA实现简单的图像处理算法☆49Updated 2 years ago
- ☆37Updated 4 years ago
- FPGA图像处理仿真平台☆26Updated 3 years ago
- FPGA实现动态图像识别☆21Updated 5 years ago
- CNN accelerator implemented with Spinal HDL☆152Updated last year
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆29Updated 3 years ago