xupsh / Pynq-CV-OV5640
Pynq computer vision examples with an OV5640 camera
☆45Updated 4 years ago
Alternatives and similar repositories for Pynq-CV-OV5640:
Users that are interested in Pynq-CV-OV5640 are comparing it to the libraries listed below
- hls code zynq 7020 pynq z2 CNN☆79Updated 5 years ago
- ☆44Updated 6 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- ☆39Updated 6 years ago
- CNN accelerator implemented with Spinal HDL☆146Updated last year
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆37Updated 5 years ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆85Updated last year
- PYNQ学习资料☆162Updated 5 years ago
- First lesson for you to use DNNDK, also it can be helpful for your AI learning☆68Updated last year
- CNN-Accelerator based on FPGA developed by verilog HDL.☆46Updated 4 years ago
- Convolution Neural Network of vgg19 model in verilog☆46Updated 7 years ago
- Zynq-7000 DPU TRD☆44Updated 5 years ago
- 中文:☆95Updated 5 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆70Updated 6 years ago
- 2018第二届全国大学生FPGA创新设计邀请赛的作品☆59Updated 6 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆36Updated 4 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆91Updated last year
- Convolutional Neural Network Using High Level Synthesis☆86Updated 4 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆236Updated 3 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆104Updated 6 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆109Updated 7 years ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆38Updated 4 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆172Updated 11 months ago
- FPGA实现动态图像识别☆17Updated 4 years ago
- 2019 SEU-Xilinx Summer School☆48Updated 5 years ago
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆21Updated 5 years ago
- 使用FPGA实现CNN模型☆13Updated 5 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆60Updated 6 months ago
- Nuclei E203 with yolo accelerator based on xc7k325☆11Updated 7 months ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆45Updated 4 years ago