vivian13maker / The-advanced-work-of-Object-detection-based-on-FPGAs
☆29Updated 3 years ago
Alternatives and similar repositories for The-advanced-work-of-Object-detection-based-on-FPGAs:
Users that are interested in The-advanced-work-of-Object-detection-based-on-FPGAs are comparing it to the libraries listed below
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆28Updated 3 years ago
- Codes to implement MobileNet V2 in a FPGA☆25Updated 4 years ago
- ☆52Updated 2 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆47Updated 5 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆23Updated 3 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- FPGA and GPU acceleration of LeNet5☆35Updated 5 years ago
- Vitis AI Lab: MNIST classifier☆18Updated 2 years ago
- ☆21Updated 2 years ago
- Nuclei E203 with yolo accelerator based on xc7k325☆14Updated 9 months ago
- yolov5-acceleration-fpga☆10Updated this week
- a project build the SSD net in pynq-z2☆15Updated 4 years ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆52Updated last month
- ☆17Updated 2 years ago
- The second place winner for DAC-SDC 2020☆97Updated 3 years ago
- HLS_YOLOV3☆26Updated last year
- An HLS based winograd systolic CNN accelerator☆50Updated 3 years ago
- A DNN Accelerator implemented with RTL.☆63Updated 3 months ago
- A collection of tutorials for the fpgaConvNet framework.☆39Updated 7 months ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆50Updated 6 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆69Updated 5 years ago
- A CNN accelerator design inspired by MIT Eyeriss project☆17Updated 3 years ago
- 可运行☆33Updated 2 years ago
- ☆26Updated 2 years ago
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆56Updated last year
- FPGA实现动态图像识别☆20Updated 4 years ago
- An open source Verilog Based LeNet-1 Parallel CNNs Accelerator for FPGAs in Vivado 2017☆15Updated 5 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆112Updated 4 years ago
- 使用FPGA实现CNN模型☆14Updated 5 years ago
- The CNN based on the Xilinx Vivado HLS☆37Updated 3 years ago