Alternatives and similar repositories for wbuart32

Users that are interested in wbuart32 are comparing it to the libraries listed below

• skordal / potato
  A simple RISC-V processor for use in FPGA designs.
  ☆283Updated last year
• efabless / raven-picorv32
  Silicon-validated SoC implementation of the PicoSoc/PicoRV32
  ☆278Updated 5 years ago
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆235Updated 3 years ago
• ataradov / riscv
  Verilog implementation of a RISC-V core
  ☆133Updated 7 years ago
• jamieiles / uart
  Verilog UART
  ☆187Updated 12 years ago
• enjoy-digital / litedram
  Small footprint and configurable DRAM core
  ☆460Updated 3 weeks ago
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆612Updated 8 months ago
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆339Updated 2 months ago
• stffrdhrn / sdram-controller
  Verilog SDRAM memory controller
  ☆351Updated 8 years ago
• chipsalliance / f4pga-examples
  Example designs showing different ways to use F4PGA toolchains.
  ☆281Updated last year
• pulp-platform / riscv-dbg
  RISC-V Debug Support for our PULP RISC-V Cores
  ☆287Updated this week
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆402Updated 6 months ago
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆539Updated 4 years ago
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆150Updated 2 weeks ago
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆416Updated last week
• chipsalliance / VeeRwolf
  FuseSoC-based SoC for VeeR EH1 and EL2
  ☆335Updated last year
• mczerski / SD-card-controller
  WISHBONE SD Card Controller IP Core
  ☆130Updated 3 years ago
• tymonx / logic
  CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
  ☆283Updated 6 years ago
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆162Updated 6 years ago
• ZipCPU / vgasim
  A Video display simulator
  ☆174Updated 7 months ago
• tilk / riscv-simple-sv
  A simple RISC V core for teaching
  ☆197Updated 3 years ago
• chipsalliance / Cores-VeeR-EL2
  VeeR EL2 Core
  ☆310Updated last week
• SpinalHDL / SaxonSoc
  SoC based on VexRiscv and ICE40 UP5K
  ☆160Updated 9 months ago
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆168Updated 4 years ago
• f4pga / f4pga-arch-defs
  FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
  ☆298Updated last week
• nandland / spi-master
  SPI Master for FPGA - VHDL and Verilog
  ☆316Updated 2 years ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆161Updated 3 years ago
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆185Updated last year
• efabless / caravel_mpw-one
  Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
  ☆136Updated 3 years ago
• RoaLogic / RV12
  RISC-V CPU Core
  ☆400Updated 5 months ago