A simple, basic, formally verified UART controller
☆353Jan 29, 2024Updated 2 years ago
Alternatives and similar repositories for wbuart32
Users that are interested in wbuart32 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Wishbone controlled I2C controllers☆63Aug 10, 2026Updated 2 months ago
- Verilog UART☆587Feb 27, 2025Updated last year
- A small, light weight, RISC CPU soft core☆1,590Sep 16, 2026Updated 3 weeks ago
- Generic Register Interface (contains various adapters)☆140Aug 6, 2026Updated 2 months ago
- Various HDL (Verilog) IP Cores☆935Jul 1, 2021Updated 5 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,721Sep 24, 2026Updated 2 weeks ago
- Bus bridges and other odds and ends☆706Sep 11, 2026Updated last month
- A utility for Composing FPGA designs from Peripherals☆193Aug 31, 2026Updated last month
- A wishbone controlled scope for FPGA's☆95Jan 12, 2024Updated 2 years ago
- Simple 8-bit UART realization on Verilog HDL.☆121Apr 27, 2024Updated 2 years ago
- A simple implementation of a UART modem in Verilog.☆197Nov 10, 2021Updated 4 years ago
- SD-Card controller, using either SPI, SDIO, or eMMC interfaces☆417Aug 10, 2026Updated 2 months ago
- An Open Source configuration of the Arty platform☆133Jan 17, 2024Updated 2 years ago
- Common SystemVerilog components☆808Sep 18, 2026Updated 3 weeks ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Verilog library for ASIC and FPGA designers☆1,442May 8, 2024Updated 2 years ago
- A collection of demonstration digital filters☆178Jan 18, 2024Updated 2 years ago
- Must-have verilog systemverilog modules☆2,026Mar 12, 2026Updated 7 months ago
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆642Sep 14, 2026Updated 3 weeks ago
- A DDR3 memory controller in Verilog for various FPGAs☆640Oct 10, 2021Updated 5 years ago
- RISC-V Debug Support for our PULP RISC-V Cores☆330Sep 15, 2026Updated 3 weeks ago
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆246Updated this week
- Verilog I2C interface for FPGA implementation☆730Feb 27, 2025Updated last year
- Verilog PCI express components☆1,669Apr 26, 2024Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Verilog AXI components for FPGA implementation☆2,153Feb 27, 2025Updated last year
- Opensource DDR3 Controller☆485Sep 12, 2026Updated last month
- RISC-V CPU Core☆453Jun 24, 2025Updated last year
- A set of Wishbone Controlled SPI Flash Controllers☆106Oct 31, 2022Updated 3 years ago
- This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块：UART接收器、UART发送器、UART转AXI4交互式调…☆352Sep 14, 2023Updated 3 years ago
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆487Sep 3, 2026Updated last month
- 32-bit Superscalar RISC-V CPU☆1,315Sep 18, 2021Updated 5 years ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,283Sep 27, 2026Updated 2 weeks ago
- An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!☆222May 21, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog Ethernet components for FPGA implementation☆3,123Feb 27, 2025Updated last year
- Small footprint and configurable PCIe core☆733Updated this week
- Collection of open-source peripherals in Verilog☆189May 3, 2022Updated 4 years ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,475Sep 25, 2026Updated 2 weeks ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,391Sep 7, 2026Updated last month
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆72May 8, 2020Updated 6 years ago
- A wishbone controlled PWM (audio) controller☆19Jan 16, 2024Updated 2 years ago