Alternatives and similar repositories for wbuart32:

Users that are interested in wbuart32 are comparing it to the libraries listed below

• f4pga / f4pga-arch-defs
  FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
  ☆282Updated this week
• skordal / potato
  A simple RISC-V processor for use in FPGA designs.
  ☆271Updated 8 months ago
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆319Updated 2 weeks ago
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆552Updated 3 weeks ago
• efabless / raven-picorv32
  Silicon-validated SoC implementation of the PicoSoc/PicoRV32
  ☆265Updated 4 years ago
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆445Updated 3 years ago
• pulp-platform / common_cells
  Common SystemVerilog components
  ☆608Updated 3 weeks ago
• RoaLogic / RV12
  RISC-V CPU Core
  ☆324Updated 11 months ago
• enjoy-digital / litedram
  Small footprint and configurable DRAM core
  ☆412Updated this week
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆231Updated 2 years ago
• SpinalHDL / SaxonSoc
  SoC based on VexRiscv and ICE40 UP5K
  ☆157Updated last month
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆278Updated 2 weeks ago
• ataradov / riscv
  Verilog implementation of a RISC-V core
  ☆115Updated 6 years ago
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆382Updated this week
• zachjs / sv2v
  SystemVerilog to Verilog conversion
  ☆621Updated last month
• openhwgroup / cvfpu
  Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
  ☆488Updated 2 months ago
• jamieiles / uart
  Verilog UART
  ☆163Updated 11 years ago
• chipsalliance / f4pga-examples
  Example designs showing different ways to use F4PGA toolchains.
  ☆275Updated last year
• nandland / spi-master
  SPI Master for FPGA - VHDL and Verilog
  ☆282Updated last year
• tymonx / logic
  CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
  ☆275Updated 5 years ago
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆178Updated 4 months ago
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆128Updated 3 years ago
• chipsalliance / VeeRwolf
  FuseSoC-based SoC for VeeR EH1 and EL2
  ☆316Updated 4 months ago
• chipsalliance / Cores-VeeR-EL2
  VeeR EL2 Core
  ☆274Updated last week
• hamsternz / DisplayPort_Verilog
  A Verilog implementation of DisplayPort protocol for FPGAs
  ☆247Updated 6 years ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆330Updated last year
• stffrdhrn / sdram-controller
  Verilog SDRAM memory controller
  ☆329Updated 7 years ago
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆134Updated last month
• f32c / f32c
  A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz
  ☆413Updated this week
• gatecat / nextpnr-xilinx
  Experimental flows using nextpnr for Xilinx devices
  ☆234Updated 6 months ago