enjoy-digital / litexLinks
Build your hardware, easily!
☆3,476Updated last week
Alternatives and similar repositories for litex
Users that are interested in litex are comparing it to the libraries listed below
Sorting:
- Universal utility for programming FPGA☆1,405Updated this week
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,872Updated 2 months ago
- SERV - The SErial RISC-V CPU☆1,639Updated 3 months ago
- 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…☆1,848Updated this week
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,657Updated last year
- A Python toolbox for building complex digital hardware☆1,303Updated 3 months ago
- nextpnr portable FPGA place and route tool☆1,506Updated this week
- Multi-platform nightly builds of open source digital design and verification tools☆1,152Updated last week
- A small, light weight, RISC CPU soft core☆1,457Updated last month
- A modern hardware definition language and toolchain based on Python☆1,772Updated last week
- Scala based HDL☆1,847Updated this week
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,396Updated last month
- Yosys Open SYnthesis Suite☆4,016Updated this week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,336Updated this week
- Modular hardware build system☆1,070Updated this week
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,092Updated 3 months ago
- Verilator open-source SystemVerilog simulator and lint system☆3,054Updated this week
- Open source ecosystem for open FPGA boards☆886Updated this week
- Visual editor for open FPGA boards☆1,813Updated 3 weeks ago
- Linux on LiteX-VexRiscv☆654Updated 2 months ago
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,611Updated this week
- cocotb: Python-based chip (RTL) verification☆2,075Updated this week
- Learning FPGA, yosys, nextpnr, and RISC-V☆2,896Updated 6 months ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,628Updated last week
- Verilog library for ASIC and FPGA designers☆1,339Updated last year
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆724Updated 7 months ago
- An Open-source FPGA IP Generator☆993Updated this week
- Send video/audio over HDMI on an FPGA☆1,201Updated last year
- GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard …☆825Updated 2 months ago
- Hardware Description Languages☆1,063Updated last month