jbush001 / NyuziProcessor
GPGPU microprocessor architecture
☆2,033Updated 2 months ago
Alternatives and similar repositories for NyuziProcessor:
Users that are interested in NyuziProcessor are comparing it to the libraries listed below
- An open source GPU based off of the AMD Southern Islands ISA.☆1,094Updated 7 years ago
- SonicBOOM: The Berkeley Out-of-Order Machine☆1,784Updated 3 months ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,173Updated last week
- A small, light weight, RISC CPU soft core☆1,338Updated last month
- ☆1,336Updated this week
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,545Updated 2 months ago
- The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux☆2,337Updated this week
- Source files for SiFive's Freedom platforms☆1,113Updated 3 years ago
- Verilog library for ASIC and FPGA designers☆1,235Updated 8 months ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,216Updated 6 months ago
- An open-source microcontroller system based on RISC-V☆917Updated 11 months ago
- Rocket Chip Generator☆3,313Updated last month
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆1,721Updated this week
- RISC-V Tools (ISA Simulator and Tests)☆1,152Updated 2 years ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,441Updated this week
- VeeR EH1 core☆836Updated last year
- SERV - The SErial RISC-V CPU☆1,467Updated last month
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,026Updated 3 weeks ago
- OpenXuantie - OpenC910 Core☆1,194Updated 6 months ago
- Working draft of the proposed RISC-V V vector extension☆992Updated 10 months ago
- educational microarchitectures for risc-v isa☆697Updated 5 months ago
- Random instruction generator for RISC-V processor verification☆1,051Updated 4 months ago
- RTL, Cmodel, and testbench for NVDLA☆1,789Updated 2 years ago
- A directory of Western Digital’s RISC-V SweRV Cores☆858Updated 4 years ago
- Scala based HDL☆1,706Updated this week
- OpenSource GPU, in Verilog, loosely based on RISC-V ISA☆877Updated last month
- RISC-V CPU Core (RV32IM)☆1,325Updated 3 years ago
- chisel tutorial exercises and answers☆706Updated 3 years ago
- RISC-V Cores, SoC platforms and SoCs☆855Updated 3 years ago
- 32-bit Superscalar RISC-V CPU☆915Updated 3 years ago