Alternatives and similar repositories for garnet

Users that are interested in garnet are comparing it to the libraries listed below

• StanfordAHA / aha
  ☆59Updated this week
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆46Updated 2 months ago
• lana555 / dynamatic
  ☆86Updated last year
• rdaly525 / coreir
  ☆103Updated 2 years ago
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆129Updated last week
• dillonhuff / ahaHLS
  An open source high level synthesis (HLS) tool built on top of LLVM
  ☆122Updated 11 months ago
• seldridge / rocket-rocc-examples
  Tests for example Rocket Custom Coprocessors
  ☆74Updated 5 years ago
• ucb-bar / gemmini-rocc-tests
  Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
  ☆59Updated 3 months ago
• UCLA-VAST / AutoBridge
  [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
  ☆122Updated 2 years ago
• hlslibs / matchlib_connections
  Matchlib Connections Library - latency insensitive channels (from NVlabs/matchlib/connections)
  ☆38Updated last week
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆30Updated 3 weeks ago
• pnnl / OpenCGRA
  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
  ☆152Updated 2 years ago
• UCLA-VAST / RapidStream
  [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.
  ☆126Updated 2 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆105Updated last year
• ccelio / chisel-style-guide
  A Style Guide for the Chisel Hardware Construction Language
  ☆107Updated 3 years ago
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆26Updated 8 months ago
• Xilinx / merlin-compiler
  ☆58Updated last year
• ucsc-vama / essent
  high-performance RTL simulator
  ☆159Updated 11 months ago
• chipsalliance / aib-phy-hardware
  Advanced Interface Bus (AIB) die-to-die hardware open source
  ☆138Updated 8 months ago
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆88Updated 2 months ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆165Updated last year
• pulp-platform / axi_riscv_atomics
  AXI Adapter(s) for RISC-V Atomic Operations
  ☆64Updated 3 weeks ago
• maltanar / fpga-tidbits
  Chisel components for FPGA projects
  ☆124Updated last year
• mrc-donato / CHIPKIT-Tutorial
  ☆15Updated 4 years ago
• intel / aib-phy-hardware
  ☆66Updated 2 years ago
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆34Updated 4 years ago
• manish-kj / PACoGen
  PACoGen: Posit Arithmetic Core Generator
  ☆70Updated 5 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆46Updated 3 months ago
• woset-workshop / woset-workshop.github.io
  Workshop on Open-Source EDA Technology (WOSET)
  ☆49Updated 6 months ago