Kuree / cgra_pnrView external linksLinks
Fast PnR toolchain for CGRA
☆18Jul 26, 2024Updated last year
Alternatives and similar repositories for cgra_pnr
Users that are interested in cgra_pnr are comparing it to the libraries listed below
Sorting:
- The PE for the second generation CGRA (garnet).☆18Apr 25, 2025Updated 9 months ago
- Documentation for the entire CGRAFlow☆19Sep 17, 2021Updated 4 years ago
- OpenMP front-end based on LLVM for CGRAs☆10Oct 2, 2022Updated 3 years ago
- Debuggable hardware generator☆71Feb 17, 2023Updated 2 years ago
- An alternative PnR system, or at least an attempt to get it running on Ubuntu 18.04.☆10Aug 31, 2018Updated 7 years ago
- ☆15Oct 24, 2019Updated 6 years ago
- ☆14Feb 1, 2026Updated last week
- Peak : Processor Specification Language ala Newell and Bell's ISP☆20Dec 5, 2023Updated 2 years ago
- Next generation CGRA generator☆118Feb 4, 2026Updated last week
- Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…☆24Updated this week
- LLVM based HLS library for HWToolkit (hardware devel. toolkit)☆27Jan 21, 2026Updated 3 weeks ago
- Public repository of the UCSC CMPE220 class project☆10Oct 8, 2017Updated 8 years ago
- ☆62Updated this week
- photonSDI - an open source SDI core☆10May 26, 2021Updated 4 years ago
- PCIe to .1 inch header breakout☆11Sep 14, 2020Updated 5 years ago
- ☆11Sep 14, 2020Updated 5 years ago
- The ANUBIS benchmark suite for Incremental Synthesis☆12Dec 15, 2020Updated 5 years ago
- ILA Model Database☆24Sep 27, 2020Updated 5 years ago
- gateware for the main fpga, including a hispi decoder and image processing☆13Sep 27, 2018Updated 7 years ago
- nextpnr portable FPGA place and route tool☆11Nov 30, 2020Updated 5 years ago
- art(?) through random code☆10Jan 3, 2023Updated 3 years ago
- ☆12Aug 25, 2019Updated 6 years ago
- SDI interface board for the apertus° AXIOM beta camera☆13Jan 19, 2019Updated 7 years ago
- enclosure for the mainboard and zturn lite☆13Mar 13, 2020Updated 5 years ago
- Next-Generation FPGA Place-and-Route☆10Aug 1, 2018Updated 7 years ago
- Fluid Pipelines☆11May 4, 2018Updated 7 years ago
- Command line tool to execute jobs in Cirrus CI☆12Aug 31, 2023Updated 2 years ago
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 6 years ago
- Efficient, header-only graph library for C++17 with a pleasant interface.☆17Jan 22, 2019Updated 7 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆20Jan 5, 2023Updated 3 years ago
- RISC-V BSV Specification☆23Jan 18, 2020Updated 6 years ago
- There are many RISC V projects on iCE40. This one is mine.☆14Jun 25, 2020Updated 5 years ago
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Aug 18, 2017Updated 8 years ago
- SoC Based on ARM Cortex-M3☆37May 16, 2025Updated 8 months ago
- iCE40 floorplan viewer☆24Jun 23, 2018Updated 7 years ago
- autorouter forked from https://www-soc.lip6.fr/git/coriolis.git☆15May 21, 2018Updated 7 years ago
- math / physics lecture notes☆16May 26, 2023Updated 2 years ago
- Yosys plugin for synthesis of Bluespec code☆15Sep 8, 2021Updated 4 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆152Feb 6, 2026Updated last week