phanrahan / mantleLinks
mantle library
☆44Updated 2 years ago
Alternatives and similar repositories for mantle
Users that are interested in mantle are comparing it to the libraries listed below
Sorting:
- Debuggable hardware generator☆70Updated 2 years ago
- Example of how to use UVM with Verilator☆25Updated 2 weeks ago
- ☆38Updated 3 years ago
- Mutation Cover with Yosys (MCY)☆88Updated 3 weeks ago
- Prefix tree adder space exploration library☆56Updated 11 months ago
- Featherweight RISC-V implementation☆53Updated 3 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated 2 years ago
- A Python package for testing hardware (part of the magma ecosystem)☆46Updated last year
- Xilinx Unisim Library in Verilog☆86Updated 5 years ago
- Bitstream relocation and manipulation tool.☆48Updated 2 years ago
- ☆56Updated 3 years ago
- PicoRV☆43Updated 5 years ago
- Benchmarks for Yosys development☆24Updated 5 years ago
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆33Updated last year
- System on Chip toolkit for Amaranth HDL☆97Updated last year
- Next-Generation FPGA Place-and-Route☆10Updated 7 years ago
- Small SERV-based SoC primarily for OpenMPW tapeout☆48Updated 5 months ago
- ☆38Updated 2 years ago
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆91Updated 6 years ago
- Gate-level visualization generator for SKY130-based chip designs.☆21Updated 4 years ago
- ☆32Updated 2 years ago
- An automatic clock gating utility☆51Updated 6 months ago
- Demo SoC for SiliconCompiler.☆62Updated 2 weeks ago
- A padring generator for ASICs☆25Updated 2 years ago
- USB virtual model in C++ for Verilog☆32Updated last year
- ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…☆34Updated 5 years ago
- Plugins for Yosys developed as part of the F4PGA project.☆83Updated last year
- Virtual development board for HDL design☆42Updated 2 years ago
- A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga☆26Updated 6 years ago