cdonovick / peak
Peak : Processor Specification Language ala Newell and Bell's ISP
☆20Updated last year
Alternatives and similar repositories for peak:
Users that are interested in peak are comparing it to the libraries listed below
- The PE for the second generation CGRA (garnet).☆17Updated 2 weeks ago
- Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…☆21Updated last week
- ☆102Updated 2 years ago
- Next generation CGRA generator☆111Updated this week
- CoreIR Symbolic Analyzer☆70Updated 4 years ago
- ☆15Updated 4 years ago
- A Hardware Pipeline Description Language☆43Updated last year
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Updated 3 years ago
- ☆25Updated 2 years ago
- RTLCheck☆21Updated 6 years ago
- Fast PnR toolchain for CGRA☆18Updated 8 months ago
- ILA Model Database☆22Updated 4 years ago
- Using e-graphs to synthesize netlists from boolean logic.☆14Updated last year
- Verilog AST☆21Updated last year
- BTOR2 MLIR project☆25Updated last year
- Languages, Tools, and Techniques for Accelerator Design☆32Updated 3 years ago
- ☆13Updated 4 years ago
- PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…☆20Updated 3 months ago
- ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…☆34Updated 4 years ago
- mantle library☆44Updated 2 years ago
- DASS HLS Compiler☆29Updated last year
- A Rocket-based RISC-V superscalar in-order core☆31Updated this week
- Integration test for entire CGRA flow☆12Updated 5 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated 2 years ago
- Python implementations of fixed size hardware types (Bit, BitVector, UInt, SInt, ...) based on the SMT-LIB2 semantics☆18Updated last year
- Papers, Posters, Presentations, Documentation...☆18Updated last year
- A Vivado HLS Command Line Helper Tool☆36Updated 3 years ago
- A fault-injection framework using Chisel and FIRRTL☆35Updated 2 years ago
- Fast Symbolic Repair of Hardware Design Code☆22Updated 2 months ago
- ☆55Updated 2 years ago