Alternatives and similar repositories for morpher:

Users that are interested in morpher are comparing it to the libraries listed below

• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆18Updated 10 months ago
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆86Updated 4 months ago
• pnnl / soda-opt
  ☆41Updated last week
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆121Updated this week
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆14Updated 2 years ago
• zhaijw18 / mcpat-calib-public
  A RISC-V BOOM Microarchitecture Power Modeling Framework
  ☆24Updated last year
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆63Updated last week
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆58Updated 5 months ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆46Updated 3 weeks ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆62Updated 8 months ago
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆20Updated 6 months ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆69Updated 3 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆48Updated 3 weeks ago
• esl-epfl / HEEPsilon
  A low power platform based on X-HEEP and integrating the ESL-CGRA
  ☆13Updated 5 months ago
• FCAS-LAB / chiplet_simulators
  A list of our chiplet simulaters
  ☆30Updated 3 years ago
• pnnl / OpenCGRA
  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
  ☆142Updated 2 years ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆46Updated 5 months ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆68Updated 5 years ago
• baichen318 / boom-explorer-public
  The open-sourced version of BOOM-Explorer
  ☆37Updated last year
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆119Updated 4 years ago
• spcl / rapidchiplet
  A toolchain for rapid design space exploration of chiplet architectures
  ☆44Updated 10 months ago
• yhqiu16 / FDRA
  DRA+RISC-V Exploration Framework
  ☆16Updated last year
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆27Updated this week
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆83Updated last year
• alexmr09 / Mixed-precision-Neural-Networks-on-RISC-V-Cores
  ☆23Updated 7 months ago
• Yinxiao-Feng / chiplet-network-sim
  ☆28Updated 3 months ago
• hngenc / stellar
  ☆22Updated 4 months ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆63Updated 3 years ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆120Updated last year
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆47Updated this week