ecolab-nus / lisa
A portable framework to map DFG (dataflow graph, representing an application) on spatial accelerators.
☆36Updated 2 years ago
Related projects ⓘ
Alternatives and complementary repositories for lisa
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆56Updated this week
- ☆38Updated 8 months ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆53Updated last month
- Template-based Reconfigurable Architecture Modeling Framework☆13Updated 2 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆65Updated 3 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆44Updated 2 years ago
- An Open-Source Tool for CGRA Accelerators☆17Updated 7 months ago
- An Open-Source Tool for CGRA Accelerators☆57Updated 3 months ago
- ☆25Updated 3 years ago
- CGRA Compilation Framework☆81Updated last year
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆30Updated 9 months ago
- EQueue Dialect☆39Updated 2 years ago
- ☆37Updated 4 months ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆14Updated 11 months ago
- ☆84Updated 9 months ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆29Updated 2 years ago
- ☆16Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆74Updated last year
- ☆12Updated 2 weeks ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆22Updated 3 months ago
- ☆15Updated 2 months ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆38Updated 6 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆51Updated 3 years ago
- Release of stream-specialization software/hardware stack.☆116Updated last year
- A reference implementation of the Mind Mappings Framework.☆28Updated 2 years ago
- An integrated CGRA design framework☆83Updated last week
- ☆12Updated 2 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆47Updated 4 months ago
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆41Updated last year
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆46Updated 2 years ago