PulseRain / ReindeerLinks
PulseRain Reindeer - RISCV RV32I[M] Soft CPU
☆127Updated 6 years ago
Alternatives and similar repositories for Reindeer
Users that are interested in Reindeer are comparing it to the libraries listed below
Sorting:
- Verilog implementation of a RISC-V core☆125Updated 7 years ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆217Updated 5 years ago
- Basic RISC-V Test SoC☆149Updated 6 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆141Updated last year
- A simple implementation of a UART modem in Verilog.☆157Updated 3 years ago
- AHB3-Lite Interconnect☆94Updated last year
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆130Updated 5 years ago
- ☆96Updated 2 months ago
- Verilog UART☆183Updated 12 years ago
- Labs to learn SpinalHDL☆149Updated last year
- Silicon-validated SoC implementation of the PicoSoc/PicoRV32☆275Updated 5 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆79Updated 3 years ago
- AMBA bus generator including AXI, AHB, and APB☆107Updated 4 years ago
- OpenXuantie - OpenE902 Core☆157Updated last year
- Ethernet MAC 10/100 Mbps☆84Updated 6 years ago
- OpenXuantie - OpenE906 Core☆142Updated last year
- AXI4 and AXI4-Lite interface definitions☆96Updated 5 years ago
- RTL Verilog library for various DSP modules☆90Updated 3 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆90Updated 2 years ago
- SDRAM controller with AXI4 interface☆98Updated 6 years ago
- Basic floating-point components for RISC-V processors☆66Updated 5 years ago
- Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog☆80Updated 6 years ago
- Verilog SPI master and slave☆60Updated 9 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- RISCV model for Verilator/FPGA targets☆53Updated 6 years ago
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆74Updated 4 years ago
- ☆245Updated 2 years ago
- I2C controller core☆46Updated 2 years ago
- RISC-V Integration for PYNQ☆176Updated 6 years ago
- Verilog digital signal processing components☆157Updated 2 years ago