A cross platform, formally verified, open source, hyperRAM controller with simulator
☆17Feb 22, 2019Updated 7 years ago
Alternatives and similar repositories for wbhyperram
Users that are interested in wbhyperram are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Dec 6, 2019Updated 6 years ago
- Multi-Rail Power Sequencer, capable of monitoring and sequencing up to 144 power rails, offers a configurable and rich set of features, s…☆21May 4, 2026Updated 3 months ago
- MicroPython port to litex FPGA platforms☆42Apr 7, 2020Updated 6 years ago
- lightweight open HLS for FPGA rapid prototyping☆20Mar 22, 2018Updated 8 years ago
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- FPGA config visualized. demo:☆20Mar 17, 2020Updated 6 years ago
- Simplified environment for litex☆14Oct 5, 2020Updated 5 years ago
- simple hyperram controller☆11Feb 10, 2019Updated 7 years ago
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- An alternative PnR system, or at least an attempt to get it running on Ubuntu 18.04.☆10Aug 31, 2018Updated 7 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆23Oct 24, 2023Updated 2 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Feb 24, 2023Updated 3 years ago
- iCE40 floorplan viewer☆24Jun 23, 2018Updated 8 years ago
- Python code to generate and print Ulam Spirals☆10Apr 22, 2026Updated 3 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Cyclone V FPGA board for UnAmiga project☆11Sep 30, 2023Updated 2 years ago
- Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in o…☆22Jan 2, 2019Updated 7 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆21May 30, 2019Updated 7 years ago
- IP-core package generator for AXI4/Avalon☆22Nov 25, 2018Updated 7 years ago
- Portable HyperRAM controller☆69Dec 8, 2024Updated last year
- Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm☆35Oct 15, 2018Updated 7 years ago
- Translation of the `Managing projects with GNU make' book to Russian.☆12May 26, 2013Updated 13 years ago
- A complete HDMI transmitter implementation in VHDL☆21Jun 27, 2025Updated last year
- A vhdl package for reading and writing bitmap files.☆12Jan 9, 2018Updated 8 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Smart contracts to finance and orchestrate energy payments of solar PV systems.☆12Oct 25, 2018Updated 7 years ago
- Website for FPGA MicroPython (FuPy)☆41Dec 30, 2018Updated 7 years ago
- Cyclone 10LP MicroMod Processor Board☆19Jan 31, 2026Updated 6 months ago
- ☆11Dec 19, 2016Updated 9 years ago
- Building FPGAs with Quartus+CMake☆18Aug 14, 2017Updated 8 years ago
- Android screemirror with scrcpy and omxplayer☆20Sep 23, 2019Updated 6 years ago
- The Free Software Media System. 适用于Rockchip SoC 和 RTD1296 的 Jellyfin,请使用已编译的镜像 https://hub.docker.com/u/jjm2473☆16Jan 29, 2024Updated 2 years ago
- Educational materials and tooling for digital HDL synthesis in Python with myHDL☆36Sep 24, 2018Updated 7 years ago
- A bearlibterminal wrapper☆17Nov 1, 2020Updated 5 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Equihash Proof of Work for Node.js☆11Oct 3, 2017Updated 8 years ago
- Verilog FPGA Parts Library. Old Octavo soft-CPU project.☆76Apr 2, 2019Updated 7 years ago
- Verilog re-implementation of the famous CAPCOM arcade game☆29Jan 25, 2019Updated 7 years ago
- ☆10Jun 26, 2025Updated last year
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆64Jan 8, 2019Updated 7 years ago
- Using VexRiscv without installing Scala☆39Nov 10, 2021Updated 4 years ago
- ZX80/81 implementation for the Ulx3s☆12May 4, 2022Updated 4 years ago