laforest / OctavoLinks
Verilog FPGA Parts Library. Old Octavo soft-CPU project.
☆75Updated 6 years ago
Alternatives and similar repositories for Octavo
Users that are interested in Octavo are comparing it to the libraries listed below
Sorting:
- Open Processor Architecture☆26Updated 9 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆33Updated last year
- OpenFPGA☆34Updated 7 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated 2 years ago
- SoftCPU/SoC engine-V☆54Updated 6 months ago
- Xilinx Unisim Library in Verilog☆85Updated 5 years ago
- Parallel Array of Simple Cores. Multicore processor.☆99Updated 6 years ago
- A Verilog Synthesis Regression Test☆37Updated last year
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆69Updated 3 years ago
- A utility for Composing FPGA designs from Peripherals☆184Updated 9 months ago
- Featherweight RISC-V implementation☆53Updated 3 years ago
- Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).☆34Updated 9 years ago
- Yet Another RISC-V Implementation☆97Updated last year
- Z-scale Microarchitectural Implementation of RV32 ISA☆55Updated 8 years ago
- Mutation Cover with Yosys (MCY)☆87Updated 3 weeks ago
- Riscy Processors - Open-Sourced RISC-V Processors☆73Updated 6 years ago
- Demo SoC for SiliconCompiler.☆61Updated last week
- OpenRISC processor IP core based on Tomasulo algorithm☆33Updated 3 years ago
- FPGA optimized RISC-V (RV32IM) implemenation☆34Updated 4 years ago
- Yosys Plugins☆22Updated 6 years ago
- A time-predictable processor for mixed-criticality systems☆58Updated 10 months ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆91Updated 6 years ago
- Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)☆37Updated 4 years ago
- CMod-S6 SoC☆42Updated 7 years ago
- A reimplementation of a tiny stack CPU☆85Updated last year
- A single-wire bi-directional chip-to-chip interface for FPGAs☆123Updated 9 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated 2 years ago
- Lipsi: Probably the Smallest Processor in the World☆86Updated last year
- PicoRV☆44Updated 5 years ago