Open source high performance IEEE-754 floating unit
☆99Feb 26, 2024Updated 2 years ago
Alternatives and similar repositories for fudian
Users that are interested in fudian are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Open-source high-performance non-blocking cache☆101Jun 17, 2026Updated 2 months ago
- ☆390Aug 19, 2026Updated 2 weeks ago
- ☆17Updated this week
- Wrappers for open source FPU hardware implementations.☆37Nov 27, 2025Updated 9 months ago
- The 'missing header' for Chisel☆24Feb 5, 2026Updated 6 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆23Updated this week
- This repo includes XiangShan's function units☆33Updated this week
- A Chisel RTL generator for network-on-chip interconnects☆233Nov 7, 2025Updated 9 months ago
- Open-source non-blocking L2 cache☆65Updated this week
- ☆92Aug 14, 2026Updated 2 weeks ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- ☆15Jul 18, 2026Updated last month
- Chisel Fixed-Point Arithmetic Library☆18Dec 15, 2025Updated 8 months ago
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl☆11Nov 3, 2021Updated 4 years ago
- ☆37Mar 20, 2025Updated last year
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆632Jul 24, 2026Updated last month
- A Rocket-based RISC-V superscalar in-order core☆42Updated this week
- Equivalence checking with Yosys☆62Updated this week
- A matrix extension proposal for AI applications under RISC-V architecture☆187Apr 1, 2026Updated 5 months ago
- A Library of Chisel3 Tools for Digital Signal Processing☆250Apr 29, 2024Updated 2 years ago
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆28Nov 21, 2019Updated 6 years ago
- RTL blocks compatible with the Rocket Chip Generator☆17Mar 30, 2025Updated last year
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Simple MIDAS Examples☆12Nov 25, 2018Updated 7 years ago
- Chisel RISC-V Vector 1.0 Implementation☆157Updated this week
- A eDSL framework based on Scala and MLIR, focusing on the Hardware design.☆77Updated this week
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- ☆13Feb 13, 2021Updated 5 years ago
- ☆35Nov 6, 2024Updated last year
- ☆10Oct 15, 2021Updated 4 years ago
- The batteries-included testing and formal verification library for Chisel-based RTL designs.☆234Aug 19, 2024Updated 2 years ago
- ☆84Jun 1, 2022Updated 4 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- ☆18Jul 9, 2025Updated last year
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆41Jan 16, 2025Updated last year
- ☆50May 11, 2022Updated 4 years ago
- ☆40Mar 6, 2026Updated 5 months ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆940Aug 18, 2026Updated 2 weeks ago
- Modern co-simulation framework for RISC-V CPUs☆183Updated this week
- Flexible Intermediate Representation for RTL☆747Aug 20, 2024Updated 2 years ago