Alternatives and similar repositories for fixedpoint

Users that are interested in fixedpoint are comparing it to the libraries listed below

• ucb-bar / shuttle
  A Rocket-based RISC-V superscalar in-order core
  ☆33Updated 2 months ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆64Updated 8 months ago
• IBM / chiffre
  A fault-injection framework using Chisel and FIRRTL
  ☆36Updated 2 months ago
• microsoft / Elastic-Silicon-Interconnect
  ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…
  ☆34Updated 4 years ago
• ucb-bar / barstools
  Useful utilities for BAR projects
  ☆32Updated last year
• thoughtworks / hardposit-chisel3
  Chisel library for Unum Type-III Posit Arithmetic
  ☆39Updated 3 months ago
• zhemao / riscv-dma
  A DMA Controller for RISCV CPUs
  ☆14Updated 9 years ago
• hplp / aes_chisel
  Implementation of the Advanced Encryption Standard in Chisel
  ☆20Updated 3 years ago
• easysoc / easysoc-firrtl
  Firrtl Syntax highlighting, Code folding and Navigate to corresponding Chisel code
  ☆9Updated 3 years ago
• grayresearch / CX
  Proposed RISC-V Composable Custom Extensions Specification
  ☆71Updated 2 weeks ago
• j-marjanovic / chisel-bfm-tester
  BFM Tester for Chisel HDL
  ☆14Updated 3 years ago
• rameloni / tywaves-chisel
  A repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code…
  ☆46Updated 8 months ago
• ucb-substrate / substrate2
  21st century electronic design automation tools, written in Rust.
  ☆30Updated last week
• chipsalliance / firrtl-spec
  The specification for the FIRRTL language
  ☆58Updated 2 weeks ago
• pulp-platform / axi_riscv_atomics
  AXI Adapter(s) for RISC-V Atomic Operations
  ☆65Updated 2 months ago
• DFiantHDL / DFHDL
  DFiant HDL (DFHDL): A Dataflow Hardware Descripition Language
  ☆88Updated this week
• ovh / sv2chisel
  (System)Verilog to Chisel translator
  ☆115Updated 3 years ago
• zhemao / riscv-dma3
  The 3rd Iteration of the Berkeley RISC-V DMA Accelerator
  ☆28Updated 5 years ago
• euphoric-hardware / rtl-simulation-reading
  ☆17Updated 3 weeks ago
• rahulk29 / sram22
  A configurable SRAM generator
  ☆53Updated last week
• B-Lang-org / bdw
  BSC Development Workstation (BDW)
  ☆29Updated 8 months ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆50Updated 3 months ago
• HEP-SoC / SoCMake
  CMake based hardware build system
  ☆29Updated last week
• ucb-bar / compress-acc
  ☆14Updated 3 months ago
• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆34Updated last week
• uenoku / firtool-standalone-plugin
  an experiment to run plugin in firtool pipeline
  ☆9Updated last year
• schoeberl / wildcat
  An implementation of RISC-V
  ☆35Updated last week
• YosysHQ / yosys-bigsim
  A collection of big designs to run post-synthesis simulations with yosys
  ☆49Updated 9 years ago
• RoaLogic / plic
  Platform Level Interrupt Controller
  ☆41Updated last year
• Lampro-Mellon / Quasar
  Quasar 2.0: Chisel equivalent of SweRV-EL2
  ☆30Updated 4 years ago