taneroksuz / fpuLinks
IEEE 754 single and double precision floating point library in systemverilog and vhdl
☆72Updated 10 months ago
Alternatives and similar repositories for fpu
Users that are interested in fpu are comparing it to the libraries listed below
Sorting:
- General Purpose AXI Direct Memory Access☆60Updated last year
- Xilinx AXI VIP example of use☆42Updated 4 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆79Updated 4 years ago
- AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream t…☆142Updated last week
- A simple DDR3 memory controller☆60Updated 2 years ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆179Updated 11 months ago
- SpinalHDL Hardware Math Library☆93Updated last year
- ☆67Updated 4 years ago
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆92Updated 2 months ago
- RISC-V Nox core☆68Updated 3 months ago
- Simple single-port AXI memory interface☆46Updated last year
- A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.☆47Updated 3 years ago
- Repository gathering basic modules for CDC purpose☆54Updated 5 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆158Updated 3 weeks ago
- 32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.☆92Updated 6 years ago
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆121Updated 3 months ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆66Updated last year
- Mathematical Functions in Verilog☆95Updated 4 years ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆74Updated 2 years ago
- AXI4 and AXI4-Lite interface definitions☆96Updated 5 years ago
- Introductory course into static timing analysis (STA).☆98Updated 3 months ago
- Python Tool for UVM Testbench Generation☆54Updated last year
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆59Updated last week
- ☆99Updated 2 years ago
- BlackParrot on Zynq☆48Updated this week
- SDRAM controller with AXI4 interface☆98Updated 6 years ago
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆70Updated 4 years ago
- Platform Level Interrupt Controller☆43Updated last year
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆67Updated last month
- Wavious DDR (WDDR) Physical interface (PHY) Hardware☆115Updated 4 years ago