Open-source high-performance non-blocking cache
☆100Jun 17, 2026Updated last month
Alternatives and similar repositories for HuanCun
Users that are interested in HuanCun are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Open-source non-blocking L2 cache☆65Updated this week
- Open source high performance IEEE-754 floating unit☆99Feb 26, 2024Updated 2 years ago
- ☆17Updated this week
- ☆15Jul 18, 2026Updated 3 weeks ago
- Modern co-simulation framework for RISC-V CPUs☆182Updated this week
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Documentation for XiangShan☆445Updated this week
- ☆85Jun 1, 2022Updated 4 years ago
- An RTL generator for a last-level shared inclusive TileLink cache controller☆25Aug 8, 2026Updated last week
- XiangShan Frontend Develop Environment☆72Aug 7, 2026Updated last week
- A Chisel RTL generator for network-on-chip interconnects☆233Nov 7, 2025Updated 9 months ago
- The 'missing header' for Chisel☆24Feb 5, 2026Updated 6 months ago
- A soft multimedia/graphics processor prototype in Chisel 3☆11May 3, 2023Updated 3 years ago
- ☆17Mar 17, 2022Updated 4 years ago
- Super fast RISC-V ISA emulator for XiangShan processor☆340Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆92Updated this week
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆20Nov 27, 2024Updated last year
- ☆151Updated this week
- Wavious Wlink☆12Oct 28, 2021Updated 4 years ago
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- The Unified TileLink Memory Subsystem Tester for XiangShan☆15Jul 25, 2026Updated 3 weeks ago
- ☆12Jan 19, 2022Updated 4 years ago
- ☆44Aug 7, 2026Updated last week
- Wrapper for ETH Ariane Core☆21Sep 2, 2025Updated 11 months ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Wrappers for open source FPU hardware implementations.☆37Nov 27, 2025Updated 8 months ago
- A fault-injection framework using Chisel and FIRRTL☆39Sep 17, 2025Updated 10 months ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Jul 20, 2026Updated 3 weeks ago
- The batteries-included testing and formal verification library for Chisel-based RTL designs.☆234Aug 19, 2024Updated last year
- ☆18Jul 9, 2025Updated last year
- ☆13Feb 13, 2021Updated 5 years ago
- A Library of Chisel3 Tools for Digital Signal Processing☆249Apr 29, 2024Updated 2 years ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆938Updated this week
- ☆37Mar 20, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Instruction Set Generator initially contributed by Futurewei☆312Oct 17, 2023Updated 2 years ago
- World's first Nintendo 3DS emulator for Apple devices based on Citra.☆18Apr 7, 2023Updated 3 years ago
- Open-source high-performance RISC-V processor☆7,192Updated this week
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆25Feb 1, 2020Updated 6 years ago
- ☆71Jul 30, 2026Updated 2 weeks ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,355Updated this week
- A RISC-V core running Debian (and a LoongArch core running Linux).☆23Nov 24, 2025Updated 8 months ago