Alternatives and similar repositories for fpu-wrappers

Users that are interested in fpu-wrappers are comparing it to the libraries listed below

• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• chipsalliance / playground
  chipyard in mill :P
  ☆77Updated 2 years ago
• jiegec / rocket-chip-vcu128
  Run Rocket Chip on VCU128
  ☆30Updated 2 months ago
• sequencer / arithmetic
  ☆33Updated 9 months ago
• ucb-bar / chisel-gui
  A prototype GUI for chisel-development
  ☆51Updated 5 years ago
• OpenXiangShan / CoupledL2
  Open-source non-blocking L2 cache
  ☆51Updated this week
• IBM / chiffre
  A fault-injection framework using Chisel and FIRRTL
  ☆36Updated 3 months ago
• CTSRD-CHERI / SIMTight
  Synthesisable SIMT-style RISC-V GPGPU
  ☆48Updated 5 months ago
• freechipsproject / chisel-cheatsheet
  Chisel Cheatsheet
  ☆34Updated 2 years ago
• chipsalliance / systemc-compiler
  Intel Compiler for SystemC
  ☆26Updated 2 years ago
• ucb-bar / radiance
  A Heterogeneous GPU Platform for Chipyard SoC
  ☆40Updated 2 weeks ago
• ucb-bar / virgo
  Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC
  ☆46Updated 6 months ago
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆22Updated 9 months ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• pulp-platform / redmule
  ☆89Updated last week
• IBM / rocc-software
  C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
  ☆53Updated 5 years ago
• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆33Updated 4 months ago
• pku-liang / Cement
  The Next-gen Language & Compiler Powering Efficient Hardware Design
  ☆34Updated 11 months ago
• OpenXiangShan / fudian
  Open source high performance IEEE-754 floating unit
  ☆87Updated last year
• ucb-bar / AuRORA
  Virtualized Accelerator Orchestration for Multi-Tenant Workloads
  ☆19Updated last year
• OpenXiangShan / HuanCun
  Open-source high-performance non-blocking cache
  ☆92Updated 3 weeks ago
• Lampro-Mellon / Quasar
  Quasar 2.0: Chisel equivalent of SweRV-EL2
  ☆31Updated 4 years ago
• ucb-bar / saturn-vectors
  Chisel RISC-V Vector 1.0 Implementation
  ☆124Updated 2 months ago
• oscc-ip / sdram
  An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different …
  ☆21Updated 7 months ago
• meton-robean / Vector_MulAdd_Accelerator
  vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器
  ☆53Updated 5 years ago
• THU-DSP-LAB / ventus-gpgpu-cpp-simulator
  Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus
  ☆31Updated last week
• nhynes / chisel3-axi
  Chisel3 AXI4-{Lite, Full, Stream} Definitions
  ☆15Updated 6 years ago
• anycore / anycore-riscv-src
  The RTL source for AnyCore RISC-V
  ☆33Updated 3 years ago
• redpanda3 / chisel-book
  Hardware design with Chisel
  ☆35Updated 2 years ago
• ucb-bar / shuttle
  A Rocket-based RISC-V superscalar in-order core
  ☆36Updated 2 months ago