Alternatives and similar repositories for Cement

Users that are interested in Cement are comparing it to the libraries listed below

• pku-liang / Hestia
  ☆17Updated 7 months ago
• pku-liang / ksim
  ☆49Updated 9 months ago
• StanfordAHA / doc
  Papers, Posters, Presentations, Documentation...
  ☆19Updated last year
• ucb-bar / AuRORA
  Virtualized Accelerator Orchestration for Multi-Tenant Workloads
  ☆19Updated 11 months ago
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆51Updated 2 years ago
• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆31Updated 2 months ago
• euphoric-hardware / rtl-simulation-reading
  ☆18Updated 4 months ago
• epfl-vlsc / parendi
  Parendi: Thousand-way Parallel RTL Simulation on the Graphcore IPU
  ☆24Updated last year
• NVlabs / GL0AM
  GL0AM GPU Accelerated Gate Level Logic Simulator
  ☆28Updated 2 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 3 years ago
• ucb-bar / radiance
  A Heterogeneous GPU Platform for Chipyard SoC
  ☆37Updated this week
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆43Updated 4 months ago
• ucb-bar / shuttle
  A Rocket-based RISC-V superscalar in-order core
  ☆35Updated last month
• UCLA-VAST / heterohalide
  HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
  ☆15Updated 5 years ago
• apl-cornell / PDL
  A Hardware Pipeline Description Language
  ☆49Updated 4 months ago
• sfu-arch / muir
  ☆24Updated 5 years ago
• iscas-tis / CHA
  ☆19Updated last year
• CMU-SAFARI / Pythia-HDL
  Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL. To know more, …
  ☆17Updated 4 years ago
• hanchenye / polyaie
  An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE
  ☆16Updated 3 years ago
• jianyicheng / iiProver
  An LLVM pass to prove that an II works for the given loop for Vitis HLS
  ☆11Updated 4 years ago
• CMU-SAFARI / Load-Inspector
  A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…
  ☆23Updated last year
• fpgasystems / hacc
  ETHZ Heterogeneous Accelerated Compute Cluster.
  ☆38Updated last month
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated 2 years ago
• yzwangfeng / reram-synthesis
  A synthesis flow for hybrid processing-in-RRAM modes
  ☆12Updated 4 years ago
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆35Updated last year
• Synthesys-Lab / assassyn
  Asynchronous semantics for architectural simulation and synthesis.
  ☆55Updated last week
• esa-tu-darmstadt / SCAIE-V
  An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:
  ☆16Updated last year
• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆41Updated last year
• ucb-bar / RoSE
  A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robot…
  ☆45Updated 7 months ago
• suchandler96 / gem5-NVDLA
  ☆36Updated 7 months ago