Alternatives and similar repositories for Cement

Users that are interested in Cement are comparing it to the libraries listed below

• pku-liang / Hestia
  ☆17Updated 5 months ago
• pku-liang / ksim
  ☆46Updated 7 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• UCLA-VAST / heterohalide
  HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
  ☆15Updated 5 years ago
• CMU-SAFARI / Pythia-HDL
  Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL. To know more, …
  ☆17Updated 3 years ago
• ucb-bar / AuRORA
  Virtualized Accelerator Orchestration for Multi-Tenant Workloads
  ☆18Updated 9 months ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆41Updated 2 months ago
• hanchenye / polyaie
  An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE
  ☆16Updated 3 years ago
• epfl-vlsc / parendi
  Parendi: Thousand-way Parallel RTL Simulation on the Graphcore IPU
  ☆23Updated last year
• euphoric-hardware / rtl-simulation-reading
  ☆17Updated 2 months ago
• suchandler96 / gem5-NVDLA
  ☆34Updated 5 months ago
• sfu-arch / muir
  ☆24Updated 4 years ago
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆50Updated 2 years ago
• CMU-SAFARI / Load-Inspector
  A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…
  ☆21Updated last year
• pku-dasys / easymac
  ☆16Updated 3 years ago
• yonseicasl / NPUsim
  NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators
  ☆41Updated 8 months ago
• NVlabs / GL0AM
  GL0AM GPU Accelerated Gate Level Logic Simulator
  ☆25Updated 3 weeks ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated last year
• ucb-bar / RoSE
  A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robot…
  ☆44Updated 5 months ago
• StanfordAHA / doc
  Papers, Posters, Presentations, Documentation...
  ☆19Updated last year
• wincle626 / HLS_Legup
  ☆28Updated 7 years ago
• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆30Updated 3 weeks ago
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆33Updated 2 years ago
• icgrp / hipr
  ☆16Updated 2 years ago
• pulp-platform / dram_rtl_sim
  ☆18Updated last month
• esa-tu-darmstadt / SCAIE-V
  An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:
  ☆16Updated last year
• iscas-tis / CHA
  ☆19Updated last year
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆40Updated 8 months ago
• yzwangfeng / reram-synthesis
  A synthesis flow for hybrid processing-in-RRAM modes
  ☆12Updated 4 years ago
• Dinistro / circt-stream
  A stream to RTL compiler based on MLIR and CIRCT
  ☆15Updated 2 years ago