OpenXiangShan / UtilityLinks
☆15Updated last week
Alternatives and similar repositories for Utility
Users that are interested in Utility are comparing it to the libraries listed below
Sorting:
- Open-source non-blocking L2 cache☆51Updated this week
- A Rocket-based RISC-V superscalar in-order core☆36Updated 2 months ago
- A Heterogeneous GPU Platform for Chipyard SoC☆40Updated 2 weeks ago
- This repo includes XiangShan's function units☆28Updated this week
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆34Updated 11 months ago
- Wrappers for open source FPU hardware implementations.☆35Updated 3 weeks ago
- A fault-injection framework using Chisel and FIRRTL☆36Updated 3 months ago
- Wrapper for ETH Ariane Core☆21Updated 3 months ago
- An RTL generator for a last-level shared inclusive TileLink cache controller☆22Updated 11 months ago
- Run Rocket Chip on VCU128☆30Updated 2 months ago
- ☆41Updated 3 weeks ago
- A collection of tests and benchmarks for the Arc simulation backend of CIRCT☆33Updated 4 months ago
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆20Updated last year
- chipyard in mill :P☆77Updated 2 years ago
- ☆33Updated 9 months ago
- Open-source AMBA CHI infrastructures (supporting Issue B, E.b)☆31Updated this week
- Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.☆16Updated 6 months ago
- Open-source high-performance non-blocking cache☆92Updated 3 weeks ago
- RTL blocks compatible with the Rocket Chip Generator☆16Updated 8 months ago
- Chisel Cheatsheet☆34Updated 2 years ago
- A prototype GUI for chisel-development☆51Updated 5 years ago
- Tightly-coupled cache coherence unit for CVA6 using the ACE protocol☆37Updated last year
- The ParaNut Processor - Highly Parallel and More Than Just a CPU Core☆36Updated 2 years ago
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆61Updated 3 years ago
- Intel Compiler for SystemC☆26Updated 2 years ago
- SCARV: a side-channel hardened RISC-V platform☆28Updated 2 years ago
- Open source high performance IEEE-754 floating unit☆87Updated last year
- ☆37Updated last year
- Amazon F1-inspired Xilinx VCU118 hardware design framework☆12Updated 4 years ago
- ☆22Updated 3 weeks ago