Alternatives and similar repositories for XiangShan-doc

Users that are interested in XiangShan-doc are comparing it to the libraries listed below

• OSCPU / NutShell-doc
  ☆125Updated 3 years ago
• THU-DSP-LAB / ventus-gpgpu
  GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
  ☆856Updated this week
• DawnCarol / DawnCarol
  ☆210Updated 8 months ago
• ucb-bar / riscv-mini
  Simple RISC-V 3-stage Pipeline in Chisel
  ☆602Updated last year
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,362Updated last year
• OpenXiangShan / NEMU
  Super fast RISC-V ISA emulator for XiangShan processor
  ☆303Updated this week
• cnrv / riscv-soc-book
  关于RISC-V你所需要知道的一切
  ☆558Updated 2 years ago
• pulp-platform / ara
  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …
  ☆481Updated last month
• schoeberl / chisel-book
  Digital Design with Chisel
  ☆889Updated last month
• OpenXiangShan / difftest
  Modern co-simulation framework for RISC-V CPUs
  ☆166Updated this week
• mariusmm / RISC-V-TLM
  RISC-V SystemC-TLM simulator
  ☆335Updated last month
• openhwgroup / force-riscv
  Instruction Set Generator initially contributed by Futurewei
  ☆302Updated 2 years ago
• schoeberl / chisel-lab
  Lab exercises for Chisel in the digital electronics 2 course at DTU
  ☆217Updated last month
• freechipsproject / chisel-bootcamp
  Generator Bootcamp Material: Learn Chisel the Right Way
  ☆1,095Updated last year
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆192Updated last year
• cnrv / rocket-chip-read
  Comment on the rocket-chip source code
  ☆179Updated 7 years ago
• cnrv / fpga-rocket-chip
  Wrapper for Rocket-Chip on FPGAs
  ☆138Updated 3 years ago
• XUANTIE-RV / openc906
  OpenXuantie - OpenC906 Core
  ☆380Updated last year
• cnrv / home
  为推广RISC-V尽些薄力
  ☆312Updated 2 years ago
• RV-BOSC / OpenNoC
  ☆214Updated 6 months ago
• ucb-bar / riscv-sodor
  educational microarchitectures for risc-v isa
  ☆728Updated 3 months ago
• chipsalliance / chisel-template
  A template project for beginning new Chisel work
  ☆677Updated 3 months ago
• shawn110285 / Cookabarra
  a training-target implementation of rv32im, designed to be simple and easy to understand
  ☆61Updated 4 years ago
• eugene-tarassov / vivado-risc-v
  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
  ☆1,031Updated 3 weeks ago
• OSCPU / ysyx-workbench
  ☆159Updated last week
• riscv-mcu / hbird-sdk
  OpenSource HummingBird RISC-V Software Development Kit
  ☆167Updated 2 years ago
• XUANTIE-RV / riscv-matrix-extension-spec
  A matrix extension proposal for AI applications under RISC-V architecture
  ☆156Updated 10 months ago
• LoveLonelyTime / Bergamot
  An exquisite superscalar RV32GC processor.
  ☆162Updated 11 months ago
• sycuricon / starship
  Run rocket-chip on FPGA
  ☆76Updated last month
• vortexgpgpu / vortex_tutorials
  ☆205Updated 2 months ago