Alternatives and similar repositories for ysyx-summer-readings

Users that are interested in ysyx-summer-readings are comparing it to the libraries listed below

• OSCPU / ysyxSoC
  ☆86Updated last month
• OSCPU / yosys-sta
  ☆64Updated last month
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆162Updated 7 months ago
• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated last year
• Groupsun / riscv-mini-five-stage
  This is my graduation project, a simple processor soft core, which implements RV32I ISA.
  ☆17Updated 6 years ago
• Clo91eaf / PUA-MIPS
  NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
  ☆13Updated 2 months ago
• OpenXiangShan / XiangShan-Design-Doc
  Documentation for XiangShan Design
  ☆26Updated last week
• wataru030-XIAOHEI / My-RISCV64-CORE-writing
  一生一芯 ， ysyx ， npc . the repo of the YSYX project . a riscv-64 CPU . writing .
  ☆28Updated 2 years ago
• OSCPU / chisel-playground
  ☆67Updated 3 months ago
• CmdBlockZQG / rvcore-mini-linux
  Build mini linux for your own RISC-V emulator!
  ☆21Updated 8 months ago
• MrAMS / verilogModuleAddPrefix
  verilog module add prefix script 可用于ysyx项目添加学号
  ☆13Updated last year
• OSCPU-Zhoushan / Zhoushan
  Open Source Chip Project by University (OSCPU) - Zhoushan Core
  ☆51Updated 2 years ago
• github-3rr0r / RV32ISC
  A RISC-V RV32I ISA Single Cycle CPU
  ☆23Updated last week
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated last month
• fluctlight001 / nscscc2022_single_tools
  龙芯杯个人赛工具包（适用于个人赛的golden_trace工具）
  ☆54Updated last year
• Yawei-Ding / ysyx_riscv64_cpu
  ☆66Updated 2 years ago
• yizishun / ysyx-framework
  A framework for ysyx flow
  ☆11Updated 7 months ago
• OpenXiangShan / GEM5
  ☆86Updated this week
• ysyx-ta / ysyx-slides
  ☆28Updated last month
• USTC-System-Courses / CECS-Lab
  ☆38Updated last year
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆49Updated 7 months ago
• HIT-MaRiver-mips / cpucore-mariver
  ☆35Updated last year
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆80Updated last year
• XS-MLVP / picker
  Pick your favorite language to verify your chip.
  ☆49Updated last week
• MrAMS / NagiCore
  顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel
  ☆19Updated 6 months ago
• zhhangBian / BOOM_chip
  乱序双发处理器，在2024年计算机系统能力大赛CPU赛道（龙芯杯）获二等奖，全国第四
  ☆14Updated 9 months ago
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆26Updated last year
• OpenXiangShan / difftest
  Modern co-simulation framework for RISC-V CPUs
  ☆145Updated this week
• Jasonyanyusong / ysyx-npc-workbench
  一生一芯RISCV处理器核代码仓库（包括相关工具）
  ☆14Updated 8 months ago
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆35Updated 4 years ago