OpenXiangShan / NEMULinks
☆288Updated this week
Alternatives and similar repositories for NEMU
Users that are interested in NEMU are comparing it to the libraries listed below
Sorting:
- Modern co-simulation framework for RISC-V CPUs☆147Updated this week
- Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.☆173Updated 4 years ago
- ☆122Updated 3 years ago
- 体系结构研讨 + ysyx高阶大纲 (WIP☆176Updated 9 months ago
- Documentation for XiangShan☆419Updated this week
- ☆200Updated 3 months ago
- A Simple RISC-V CPU Simulator with 5 Stage Pipeline, Branch Prediction and Cache Simulation☆186Updated last year
- XiangShan Frontend Develop Environment☆64Updated this week
- ☆156Updated this week
- 《从零开始的RISC-V模拟器开发》配套的PPT和教学资料☆224Updated 3 years ago
- RISC-V模拟器,相关硬件实现`riscv-isa-sim`以及模拟器pk, bbl的指导手册☆53Updated 5 years ago
- 一生一芯的信息发布和内容网站☆132Updated last year
- A translation project of the RISC-V reader☆175Updated last year
- PLCT实验室的 RISC-V V Spec 实现,基于llvm/llvm-project,rkruppe/rvv-llvm 和 https://repo.hca.bsc.es/gitlab/rferrer/llvm-epi-0.8☆161Updated 7 months ago
- An exquisite superscalar RV32GC processor.☆159Updated 6 months ago
- Run rocket-chip on FPGA☆70Updated 8 months ago
- NJU Virtual Board☆285Updated 3 weeks ago
- 关于RISC-V你所需要知道的一切☆563Updated 2 years ago
- ☆93Updated this week
- Open-source high-performance RISC-V processor☆28Updated last month
- Pick your favorite language to verify your chip.☆60Updated this week
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆51Updated 3 years ago
- Simple RISC-V 3-stage Pipeline in Chisel☆586Updated 11 months ago
- 平头哥玄铁C910的LLVM工具链支持,由PLCT实验室提供,非官方版本☆73Updated 4 years ago
- ☆169Updated 4 years ago
- Lab exercises for Chisel in the digital electronics 2 course at DTU☆205Updated last month
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆776Updated last week
- ☆38Updated last year
- 💻 RISC-V Simulator of RV32I ISA. 5-stage pipeline / out-of-order execution with Tomasulo algorithm and Speculation. Support runtime visu…☆201Updated 5 years ago
- This is a repo for recording and reporting RISCV platform's test and measurement continuously.☆59Updated last year