Alternatives and similar repositories for riscv-soc-book

Users that are interested in riscv-soc-book are comparing it to the libraries listed below

• cnrv / home
  为推广RISC-V尽些薄力
  ☆312Updated last year
• OpenXiangShan / XiangShan-doc
  Documentation for XiangShan
  ☆413Updated this week
• OSCPU / NutShell-doc
  ☆122Updated 2 years ago
• LiHao217 / RISC-V_article_paper_src
  riscv资料、论文等
  ☆143Updated 6 years ago
• Lingrui98 / RISC-V-book
  A translation project of the RISC-V reader
  ☆175Updated last year
• plctlab / writing-your-first-riscv-simulator
  《从零开始的RISC-V模拟器开发》配套的PPT和教学资料
  ☆218Updated 3 years ago
• OpenXiangShan / NEMU
  ☆274Updated this week
• MaxXSoft / Fuxi
  Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
  ☆172Updated 3 years ago
• ucb-bar / riscv-mini
  Simple RISC-V 3-stage Pipeline in Chisel
  ☆572Updated 9 months ago
• liangkangnan / tinyriscv
  A very simple and easy to understand RISC-V core.
  ☆1,227Updated last year
• THU-DSP-LAB / ventus-gpgpu
  GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
  ☆731Updated this week
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,486Updated 7 months ago
• DawnCarol / DawnCarol
  ☆187Updated last month
• eugene-tarassov / vivado-risc-v
  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
  ☆945Updated 2 weeks ago
• freechipsproject / chisel-bootcamp
  Generator Bootcamp Material: Learn Chisel the Right Way
  ☆1,035Updated 8 months ago
• NJU-ProjectN / nvboard
  NJU Virtual Board
  ☆276Updated 3 weeks ago
• xupsh / pp4fpgas-cn
  中文版 Parallel Programming for FPGAs
  ☆725Updated 8 months ago
• LoveLonelyTime / Bergamot
  An exquisite superscalar RV32GC processor.
  ☆156Updated 4 months ago
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆156Updated 6 months ago
• LvNA-system / labeled-RISC-V
  ☆169Updated 3 years ago
• ucb-bar / chisel-tutorial
  chisel tutorial exercises and answers
  ☆724Updated 3 years ago
• schoeberl / chisel-book
  Digital Design with Chisel
  ☆832Updated this week
• runninglinuxkernel / riscv_programming_practice
  ☆204Updated last year
• OSCPU / ysyx-workbench
  ☆148Updated 2 weeks ago
• lmxyy / Computer-Architecture-Task-2
  Riscv32 CPU Project
  ☆90Updated 7 years ago
• chipsalliance / chisel-template
  A template project for beginning new Chisel work
  ☆635Updated last week
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,165Updated 2 years ago
• trivialmips / nontrivial-mips
  NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
  ☆598Updated 4 years ago
• WangXuan95 / BSV_Tutorial_cn
  一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。
  ☆568Updated last year
• Nitcloud / Digital-IDE
  在vscode上的数字设计开发插件
  ☆372Updated 2 years ago