cnrv / riscv-soc-bookLinks
关于RISC-V你所需要知道的一切
☆562Updated 2 years ago
Alternatives and similar repositories for riscv-soc-book
Users that are interested in riscv-soc-book are comparing it to the libraries listed below
Sorting:
- 为推广RISC-V尽些薄力☆311Updated 2 years ago
- Documentation for XiangShan☆418Updated this week
- A translation project of the RISC-V reader☆175Updated last year
- ☆284Updated last week
- ☆122Updated 3 years ago
- riscv资料、论文等☆143Updated 6 years ago
- 《从零开始的RISC-V模拟器开发》配套的PPT和教学资料☆224Updated 3 years ago
- Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.☆173Updated 4 years ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆765Updated last week
- NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.☆603Updated 5 years ago
- ☆196Updated 3 months ago
- Simple RISC-V 3-stage Pipeline in Chisel☆584Updated 11 months ago
- NJU Virtual Board☆283Updated last week
- 一生一芯的信息发布和内容网站☆131Updated last year
- ☆209Updated last year
- A very simple and easy to understand RISC-V core.☆1,272Updated last year
- 体系结构研讨 + ysyx高阶大纲 (WIP☆172Updated 9 months ago
- ☆151Updated last month
- The Ultra-Low Power RISC-V Core☆1,540Updated 9 months ago
- RISC-V SoC designed by students in UCAS☆1,468Updated 6 months ago
- Riscv32 CPU Project☆93Updated 7 years ago
- Generator Bootcamp Material: Learn Chisel the Right Way☆1,050Updated 10 months ago
- An exquisite superscalar RV32GC processor.☆159Updated 6 months ago
- The Ultra-Low Power RISC Core☆48Updated 5 years ago
- ☆169Updated 4 years ago
- Digital Design with Chisel☆845Updated 2 weeks ago
- A RISC-V ELF psABI Document☆789Updated this week
- chisel tutorial exercises and answers☆736Updated 3 years ago
- A template project for beginning new Chisel work☆652Updated last month
- OpenXuantie - OpenC910 Core☆1,288Updated last year