Scripts for XiangShan
☆17Mar 12, 2026Updated last week
Alternatives and similar repositories for env-scripts
Users that are interested in env-scripts are comparing it to the libraries listed below
Sorting:
- This repo includes XiangShan's function units☆30Feb 14, 2026Updated last month
- Spike, a RISC-V ISA Simulator☆10Jan 22, 2026Updated last month
- XiangShan Frontend Develop Environment☆69Mar 3, 2026Updated 2 weeks ago
- 开放验证平台NutShell Cache验证案例☆11Dec 2, 2025Updated 3 months ago
- Manycore platform Simulation tool for NoC-based platform at a Transactional Level Modeling level☆10Aug 30, 2016Updated 9 years ago
- A library to retrieve JEP106 manufacturer strings in Rust.☆12May 7, 2025Updated 10 months ago
- Xiangshan deterministic workloads generator☆24May 14, 2025Updated 10 months ago
- Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.☆26Mar 1, 2021Updated 5 years ago
- ☆10Oct 15, 2021Updated 4 years ago
- ☆12Jan 19, 2022Updated 4 years ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- UVM components for DSP tasks (MODulation/DEModulation)☆14Mar 2, 2022Updated 4 years ago
- ☆10Nov 12, 2019Updated 6 years ago
- This is for uvm_tb_gen☆52Feb 13, 2025Updated last year
- Axiom Alpha prototype hardware source files (electronic schematics, documentation, PCB layouts, etc.)☆22Jun 10, 2014Updated 11 years ago
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- ☆11Dec 23, 2025Updated 2 months ago
- ☆48May 11, 2022Updated 3 years ago
- ☆42Updated this week
- Documentation for XiangShan☆434Updated this week
- coursier CLI launchers☆14Mar 12, 2026Updated last week
- 链家二手房挂牌价爬虫☆10Jul 6, 2022Updated 3 years ago
- Axiom Alpha prototype software (FPGA, Linux, etc.)☆30Dec 9, 2015Updated 10 years ago
- HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…☆110Oct 31, 2023Updated 2 years ago
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆78Jan 2, 2021Updated 5 years ago
- ☆13Feb 13, 2021Updated 5 years ago
- Cross-Domain DPA Attack on SAML11☆17Jul 14, 2019Updated 6 years ago
- Software update mixer and related tools☆29Aug 7, 2025Updated 7 months ago
- ☆14Jun 7, 2021Updated 4 years ago
- The source code that empowers OpenROAD Cloud☆12Jun 29, 2020Updated 5 years ago
- Open-Source EDA workshop for RISC-V community☆12Jul 27, 2022Updated 3 years ago
- ☆16Updated this week
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- Netlist and Verilog Haskell Package☆19Nov 21, 2010Updated 15 years ago
- Enhance the native `gf` command to act like node-resolve☆10Dec 19, 2022Updated 3 years ago
- This is a C library to interface with the LiteX Firmware on Thunderscope over PCIe☆11Feb 22, 2026Updated 3 weeks ago
- Help to comply with the Google C++ Style Guide on Emacs with flymake☆11Nov 21, 2025Updated 4 months ago
- This document adopts the method from the XAPP1230 for doing readback capture on Xilinx UltraScale devices and shows how to migrate the sa…☆18Nov 15, 2019Updated 6 years ago
- ☆20May 8, 2012Updated 13 years ago