Scripts for XiangShan
☆17Feb 16, 2026Updated last week
Alternatives and similar repositories for env-scripts
Users that are interested in env-scripts are comparing it to the libraries listed below
Sorting:
- This repo includes XiangShan's function units☆30Feb 14, 2026Updated 2 weeks ago
- Manycore platform Simulation tool for NoC-based platform at a Transactional Level Modeling level☆10Aug 30, 2016Updated 9 years ago
- Spike, a RISC-V ISA Simulator☆10Jan 22, 2026Updated last month
- ☆12Jan 19, 2022Updated 4 years ago
- Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.☆26Mar 1, 2021Updated 4 years ago
- Xiangshan deterministic workloads generator☆24May 14, 2025Updated 9 months ago
- Axiom Alpha prototype hardware source files (electronic schematics, documentation, PCB layouts, etc.)☆22Jun 10, 2014Updated 11 years ago
- Axiom Alpha prototype software (FPGA, Linux, etc.)☆30Dec 9, 2015Updated 10 years ago
- Software update mixer and related tools☆29Aug 7, 2025Updated 6 months ago
- XiangShan Frontend Develop Environment☆68Updated this week
- Functional Verification of Physical Layer of PCI Express Gen5.0 Graduation Project Using UVM☆25Jul 17, 2025Updated 7 months ago
- Support code for DVCon 2021 paper submission☆12Mar 1, 2021Updated 5 years ago
- UVM components for DSP tasks (MODulation/DEModulation)☆14Mar 2, 2022Updated 3 years ago
- ☆10Nov 13, 2025Updated 3 months ago
- ☆42Feb 3, 2026Updated 3 weeks ago
- An OpenAL debugging tool.☆10Aug 31, 2021Updated 4 years ago
- Command line pastebin for sharing terminal output.☆11Jul 29, 2021Updated 4 years ago
- Extending BookSim2.0 and HotSpot6.0 for Power, Performance and Thermal evaluation of 3D NoC Architectures☆12Aug 9, 2019Updated 6 years ago
- axiom micro mainboard containing the cmos sensor, headers for plugin modules and more☆40Jan 25, 2021Updated 5 years ago
- VLSI VS1053b DSP Audio Processor Example Projects and Resources☆11Jan 17, 2018Updated 8 years ago
- An easy to use and efficient memory pool allocator written in C++☆11Jun 9, 2017Updated 8 years ago
- ☆20May 8, 2012Updated 13 years ago
- UVM clock agent which frequency, duty cycle can be configured, clock slow and gating function are also available☆10Aug 24, 2020Updated 5 years ago
- A set of yasnippets for emacs that assist with SystemVerilog☆11Nov 25, 2011Updated 14 years ago
- Code for uising the HTC vive tracking system with ROS2☆14Feb 20, 2021Updated 5 years ago
- ☆13Apr 12, 2023Updated 2 years ago
- Game 3D dibuat dengan Unity Game Engine terdapat Fitur Multiplayer (via Internet) menggunakan Photon Network dengan 4 room dan maksimal t…☆13Sep 4, 2017Updated 8 years ago
- code for progressive gsl☆12Jan 15, 2026Updated last month
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- Zest is a FMC mezzanine board with 8 ADC channels and 2 DACs☆11Nov 6, 2024Updated last year
- A library to retrieve JEP106 manufacturer strings in Rust.☆12May 7, 2025Updated 9 months ago
- [CoRL 2024] Software and hardware instructions for SoniceSense.☆15Mar 1, 2025Updated 11 months ago
- MachO editor / disassembler. No internet, no os requirements, just need a browser ;)☆12May 13, 2019Updated 6 years ago
- arduino peripheral driver code and instructions☆11Dec 5, 2022Updated 3 years ago
- LAME + AltiVec = awesome☆14Dec 17, 2017Updated 8 years ago
- This is a C library to interface with the LiteX Firmware on Thunderscope over PCIe☆11Feb 22, 2026Updated last week
- A Stream Deck Client by C#.☆14Jan 21, 2018Updated 8 years ago
- Breaking News Module Protoype☆11Updated this week
- This simulator models multi core systems, intended primarily for studies on main memory management techniques. It models a trace-based ou…☆12Jan 18, 2016Updated 10 years ago