Alternatives and similar repositories for micro-arch-training

Users that are interested in micro-arch-training are comparing it to the libraries listed below

• NJU-ProjectN / nvboard
  NJU Virtual Board
  ☆291Updated last month
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆179Updated 11 months ago
• OSCPU / ysyx-workbench
  ☆156Updated last week
• loongson-education / nscscc-wiki
  NSCSCC 信息整合
  ☆252Updated 4 years ago
• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆143Updated last year
• kaitoukito / A-Primer-on-Memory-Consistency-and-Cache-Coherence
  A Primer on Memory Consistency and Cache Coherence (Second Edition) 翻译计划
  ☆295Updated last year
• ysyx-ta / ysyx-summer-readings
  ☆67Updated last year
• OSCPU / ysyx
  一生一芯的信息发布和内容网站
  ☆134Updated last year
• Shuiliusheng / boom_stop
  jump to a place when progam runs to the max instruction number
  ☆14Updated last year
• fluctlight001 / cpu_for_nscscc2022_single
  2022年龙芯杯个人赛 单发射110M（含icache）
  ☆48Updated 3 years ago
• fluctlight001 / nscscc2022_single_tools
  龙芯杯个人赛工具包（适用于个人赛的golden_trace工具）
  ☆61Updated last year
• DawnCarol / DawnCarol
  ☆206Updated 5 months ago
• THU-DSP-LAB / ventus-gpgpu
  GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
  ☆808Updated last week
• Ch-EnShen / UCB-CS152-all-materials
  This repository collects all materials from past years of cs152.
  ☆51Updated last year
• Groupsun / riscv-mini-five-stage
  This is my graduation project, a simple processor soft core, which implements RV32I ISA.
  ☆16Updated 6 years ago
• Silverster98 / bit_nscscc_suggestion
  为了更好地帮助后来的同学参加龙芯杯，草拟了这份建议，望对后来人有所帮助
  ☆128Updated 4 years ago
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆804Updated last month
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆40Updated 5 years ago
• ISRC-CAS / riscv-isa-manual-cn
  ☆191Updated last week
• github-3rr0r / RV32ISC
  A RISC-V RV32I ISA Single Cycle CPU
  ☆25Updated 4 months ago
• LoveLonelyTime / Bergamot
  An exquisite superscalar RV32GC processor.
  ☆161Updated 8 months ago
• Azalea8 / riscv_cpu
  riscv指令集，单周期以及五级流水线CPU
  ☆85Updated 9 months ago
• Yawei-Ding / ysyx_riscv64_cpu
  ☆70Updated 2 years ago
• USTC-System-Courses / CECS-Lab
  ☆40Updated 2 years ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆43Updated 5 years ago
• wataru030-XIAOHEI / My-RISCV64-CORE-writing
  一生一芯 ， ysyx ， npc . the repo of the YSYX project . a riscv-64 CPU . writing .
  ☆32Updated 3 years ago
• OpenXiangShan / XiangShan-doc
  Documentation for XiangShan
  ☆426Updated last week
• hehao98 / RISCV-Simulator
  A Simple RISC-V CPU Simulator with 5 Stage Pipeline, Branch Prediction and Cache Simulation
  ☆193Updated last year
• OSCPU / ysyxSoC
  ☆87Updated last week
• OpenXiangShan / NEMU
  Super fast RISC-V ISA emulator for XiangShan processor
  ☆294Updated last week