JBlocklove / LLMs-for-EDA-TutorialLinks
☆55Updated 5 months ago
Alternatives and similar repositories for LLMs-for-EDA-Tutorial
Users that are interested in LLMs-for-EDA-Tutorial are comparing it to the libraries listed below
Sorting:
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆58Updated 5 months ago
- ☆76Updated 5 months ago
- ☆31Updated 2 years ago
- ☆27Updated last year
- This is a python repo for flattening Verilog☆20Updated 6 months ago
- ☆92Updated 4 months ago
- ☆31Updated 3 years ago
- ☆20Updated 3 years ago
- Benchmarks for Approximate Circuit Synthesis☆17Updated 5 years ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆54Updated 10 months ago
- GPU-based logic synthesis tool☆93Updated this week
- ☆89Updated 4 months ago
- Collection of digital hardware modules & projects (benchmarks)☆69Updated last week
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆86Updated 6 months ago
- ☆41Updated last year
- This is a repo to store circuit design datasets☆19Updated last year
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆52Updated 10 months ago
- Dataset for ML-guided Accelerator Design☆41Updated last year
- ☆16Updated 3 years ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated 2 years ago
- Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".☆66Updated 5 months ago
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆40Updated last year
- Datasets for EDA LLM research☆35Updated 10 months ago
- An open-source benchmark for generating design RTL with natural language☆142Updated last year
- ☆25Updated last year
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆136Updated 3 months ago
- AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining☆18Updated 3 years ago
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆26Updated 7 months ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆107Updated last year
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆33Updated last year