☆17Apr 16, 2024Updated 2 years ago
Alternatives and similar repositories for rl-explorer
Users that are interested in rl-explorer are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [DAC2024] Explainable Fuzzy Neural Network with Multi-Fidelity Reinforcement Learning for Micro-Architecture Design Space Exploration☆10Oct 31, 2024Updated last year
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆33Feb 20, 2024Updated 2 years ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆19Dec 18, 2023Updated 2 years ago
- The open-sourced version of BOOM-Explorer☆51May 31, 2023Updated 3 years ago
- ☆13Jan 20, 2023Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization☆43May 29, 2025Updated last year
- ☆31Oct 24, 2016Updated 9 years ago
- This is a repo to store circuit design datasets☆18Jan 17, 2024Updated 2 years ago
- Seal5 - Semi-automated LLVM Support for RISC-V Extensions including Autovectorization☆25Mar 29, 2026Updated 2 months ago
- This is a python repo for flattening Verilog☆20Dec 19, 2025Updated 5 months ago
- Interactive evolutionary exploration of generative design spaces with large language models☆18Jun 26, 2024Updated last year
- ☆11Aug 4, 2022Updated 3 years ago
- ☆32Oct 7, 2022Updated 3 years ago
- Open source version of ArchGym project.☆131Apr 13, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆72May 29, 2025Updated last year
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆40Apr 13, 2025Updated last year
- ☆29Dec 24, 2023Updated 2 years ago
- 🐆 A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration for *AdderNet*☆22May 27, 2024Updated 2 years ago
- ☆29Jun 25, 2024Updated last year
- RISC-V Formal in Chisel☆13Apr 9, 2024Updated 2 years ago
- A Fast DNN Accelerator Design Space Exploration Framework.☆46Aug 10, 2022Updated 3 years ago
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆30Jan 7, 2026Updated 5 months ago
- 第一届 RISC-V 中国峰会的幻灯片等资料存放☆38Nov 17, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆10Dec 17, 2025Updated 5 months ago
- ChatEDA: A Large Language Model Powered Autonomous Agent for EDA (TCAD'24, NAACL'25)☆54May 21, 2025Updated last year
- Collection for submission (Hardware Model Checking Benchmark)☆13Nov 9, 2025Updated 7 months ago
- SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model☆16Jan 29, 2024Updated 2 years ago
- Research about dataflow architecture☆14Nov 30, 2023Updated 2 years ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆193Apr 27, 2026Updated last month
- A DAG processor and compiler for a tree-based spatial datapath.☆16Aug 24, 2022Updated 3 years ago
- ☆21Nov 3, 2025Updated 7 months ago
- gem5 FS模式实验手册☆46Mar 8, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48May 21, 2022Updated 4 years ago
- A comprehensive, modular learning path for mastering UVM (Universal Verification Methodology) and pyuvm (Python UVM implementation) with …☆33May 30, 2026Updated last week
- A Formal Verification Framework for Chisel☆19Apr 9, 2024Updated 2 years ago
- ☆16May 20, 2019Updated 7 years ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆11Dec 18, 2023Updated 2 years ago
- Memory latency test☆13May 14, 2024Updated 2 years ago
- 我设计了一些数字集成电路的教学实验,供大家学习~☆40Jan 23, 2025Updated last year