pku-dasys / easymac

Related projects ⓘ

Alternatives and complementary repositories for easymac

• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆35Updated 2 months ago
• UCLA-VAST / HARP
  ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS
  ☆13Updated 6 months ago
• zlinaf / PowerGear
  [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
  ☆17Updated 2 years ago
• cornell-zhang / HOGA
  Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
  ☆22Updated 3 months ago
• hkust-zhiyao / RTL-Timer
  Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization
  ☆17Updated 4 months ago
• UCLA-VAST / GNN-DSE
  DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"
  ☆37Updated last year
• HKUST-GZ-VLSI / Design-Dataset
  This is a repo to store circuit design datasets
  ☆15Updated 10 months ago
• HKUSTGZ-MICS-LYU / FlattenRTL
  This is a python repo for flattening Verilog
  ☆13Updated last month
• Yu-Maryland / Verilog-to-PyG
  ☆20Updated 7 months ago
• baichen318 / boom-explorer-public
  The open-sourced version of BOOM-Explorer
  ☆32Updated last year
• Yu-Maryland / Gamora
  Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)
  ☆47Updated 2 weeks ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆38Updated 6 months ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆65Updated 3 years ago
• sharc-lab / HLSFactory
  HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
  ☆19Updated this week
• UT-LCA / ML4Accel-Dataset
  Dataset for ML-guided Accelerator Design
  ☆31Updated this week
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆17Updated 7 months ago
• UCLA-VAST / AutoDSE
  ACM TODAES Best Paper Award, 2022
  ☆24Updated last year
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆38Updated 8 months ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• lydiawunan / HLS-Perf-Prediction-with-GNNs
  High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing
  ☆45Updated 5 months ago
• sjtu-zhao-lab / hierarchical-gnn-for-hls
  DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"
  ☆13Updated 2 months ago
• maestro-project / gamma
  ☆34Updated 4 months ago
• cornell-zhang / quickest
  QuickEst repository: Quick Estimation of Quality of Results
  ☆26Updated 6 years ago
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆37Updated last year
• pnnl / soda-opt
  ☆37Updated 4 months ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆28Updated 2 years ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆53Updated last month
• yzwangfeng / reram-synthesis
  A synthesis flow for hybrid processing-in-RRAM modes
  ☆12Updated 3 years ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆20Updated 2 years ago
• cornell-zhang / GLAIVE
  Graph-learning assisted instruction vulnerability estimation published in DATE 2020
  ☆13Updated 3 years ago