Alternatives and similar repositories for EDA-wiki

Users that are interested in EDA-wiki are comparing it to the libraries listed below

• pku-dasys / cocoon
  An infrastructure for integrated EDA
  ☆42Updated 2 years ago
• jinwookjungs / open_design_flow
  OpenDesign Flow Database
  ☆16Updated 7 years ago
• Xilinx / fpga24_routing_contest
  Runtime-First FPGA Interchange Routing Contest @ FPGA’24
  ☆34Updated 6 months ago
• pkuzjx / eda-collection
  ☆107Updated 6 years ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆63Updated 2 years ago
• aolofsson / POSH
  ☆44Updated 5 years ago
• scale-lab / BLASYS
  An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization
  ☆32Updated 2 years ago
• wincle626 / HLS_Legup
  ☆29Updated 8 years ago
• dian-lun-lin / RTLflow
  A GPU acceleration flow for RTL simulation with batch stimulus
  ☆116Updated last year
• zslwyuan / Light-HLS
  Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)
  ☆62Updated 3 years ago
• pkuzjx / EDA-wiki
  EDA wiki
  ☆135Updated last month
• StanfordAHA / garnet
  Next generation CGRA generator
  ☆118Updated this week
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆68Updated last year
• rachelselinar / ReGDS-Logic-Gate-Extraction
  A custom C++ routine to identify logic gates in the layout extracted netlist (SPICE) of digital circuits and generate gate-level Verilog …
  ☆31Updated last year
• NVlabs / GL0AM
  GL0AM GPU Accelerated Gate Level Logic Simulator
  ☆29Updated 3 months ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆32Updated 6 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆36Updated 5 years ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆54Updated 5 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆88Updated 7 months ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆38Updated 2 years ago
• amahzoon / genmul
  ☆18Updated 4 years ago
• OSCC-Project / iMap
  Logic optimization and technology mapping tool.
  ☆20Updated 2 years ago
• pulp-platform / ELAU
  ☆20Updated last year
• ehw-fit / ariths-gen
  Generator of arithmetic circuits (multipliers, adders) and approximate circuits
  ☆38Updated 3 months ago
• stillwater-sc / RISC-V-TensorCore
  Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra
  ☆60Updated 3 years ago
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆62Updated last year
• whatmough / CHIPKIT
  CHIPKIT: An agile, reusable open-source framework for rapid test chip development
  ☆42Updated 5 years ago
• IntelLabs / FloorSet
  ☆77Updated 5 months ago
• cornell-zhang / datuner
  DATuner Repository
  ☆17Updated 7 years ago