Alternatives and similar repositories for ChatEDA

Users that are interested in ChatEDA are comparing it to the libraries listed below

• NVlabs / CircuitOps
  ☆97Updated 6 months ago
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆141Updated 5 months ago
• OpenROAD-Assistant / EDA-Corpus
  Datasets for EDA LLM research
  ☆35Updated last year
• ai4eda / awesome-AI4EDA
  This repo awesome-AI4EDA contains the source for the webpage: https://ai4eda.github.io, which is a curated paper list of awesome AI for E…
  ☆181Updated 7 months ago
• laiyao1 / AnalogCoder
  ☆116Updated 3 weeks ago
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆60Updated 7 months ago
• hkust-zhiyao / CircuitFusion
  CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)
  ☆32Updated 9 months ago
• JBlocklove / LLMs-for-EDA-Tutorial
  ☆59Updated 7 months ago
• lesliepy99 / RAG-EDA
  ☆18Updated 9 months ago
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆26Updated last year
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆46Updated last year
• DfX-NYUAD / GNN-RE
  GNN-RE datasets for circuit recognition
  ☆56Updated 2 years ago
• hkust-zhiyao / RTLLM
  An open-source benchmark for generating design RTL with natural language
  ☆153Updated last year
• yaoxufeng / RTLRewriter-Bench
  ☆44Updated last year
• MIRALab-USTC / ChiPBench
  ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms
  ☆48Updated 4 months ago
• AutoBench / AutoBench
  ☆36Updated 9 months ago
• The-OpenROAD-Project / ORAssistant
  OpenROAD's Chatbot Assistant
  ☆28Updated this week
• DfX-NYUAD / GNN4IC
  Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability.
  ☆75Updated 6 months ago
• Thinklab-SJTU / Awesome-LLM4EDA
  ☆258Updated last year
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆64Updated 7 months ago
• dekura / LLANA
  LLM-Enhanced Bayesian Optimization for Efficient Analog Constraint Generation
  ☆29Updated last year
• aichipdesign / chipgptft
  Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)
  ☆55Updated last year
• lydiawunan / HLS-Perf-Prediction-with-GNNs
  High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing
  ☆53Updated last year
• lydiawunan / LOSTIN
  LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models
  ☆26Updated 3 years ago
• hkust-zhiyao / NetTAG
  NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph (DAC'25)
  ☆23Updated last month
• CODA-Team / AnalogGym
  ☆72Updated 2 months ago
• scale-lab / BACS
  Benchmarks for Approximate Circuit Synthesis
  ☆17Updated 5 years ago
• IntelLabs / FloorSet
  ☆78Updated 2 weeks ago
• ASU-VDA-Lab / ASP-DAC24-Tutorial
  This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024
  ☆53Updated last year
• zehao-dong / CktGNN
  Open Circuit Benchmark OCB and source code for CktGNN (https://openreview.net/forum?id=NE2911Kq1sp).
  ☆74Updated 2 years ago